• JSTS:Journal of Semiconductor Technology and Science
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• v.12 no.3
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• pp.370-376
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• 2012

In this work, design considerations for high-performance silicon photodetector are thoroughly investi- gated. Besides the critical dimensions of device, guidelines for process architecture are suggested. Abiding by those criteria for improving both direct-current (DC) and alternating-current (AC) perfor- mances, a high-speed low-operation power silicon photodetector based on p-i-n structure for optical interconnect has been designed by device simulation. An $f_{-3dB}$ of 80 GHz at an operating voltage of 1 V was obtained.

• Journal of the Korea Society of Computer and Information
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• v.24 no.2
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• pp.57-66
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• 2019

This paper compared the performance with an overview of channel equalization techniques used in high-speed serial transceivers, including the homogeneous architecture and associated components for the GHz interconnect of backplane and cable channels. It also used the MATLAB tool to present system analysis and simulation results for continuous time equivalent structures. In the case of conventional continuous equalization, high frequency deficits occur due to the use of a comparator that is difficult to implement as well as the low speed limit. In this paper, the channel equalization technique based on the power spectrum analysis of clocks was used to compensate for the frequency loss, and the application of the TX+Channel and TX+Equalizer filters enabled the measurement of attenuation and equivalence without comparators. The application of blender and band-pass filters at high speeds also showed significant effectiveness.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2005.09a
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• pp.201-212
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• 2005

[ $Epoxy/BaTiO_3$ ] composite embedded capacitor films (ECFs) were newly designed fur high dielectric constant and low tolerance (less than ${\pm}15\%$) embedded capacitor fabrication for organic substrates. In terms of material formulation, ECFs are composed of specially formulated epoxy resin and latent curing agent, and in terms of coating process, a comma roll coating method is used for uniform film thickness in large area. Dielectric constant of $BaTiO_3\;&\;SrTiO_3$ composite ECF is measured with MIM capacitor at 100 kHz using LCR meter. Dielectric constant of $BaTiO_3$ ECF is bigger than that of $SrTiO_3$ ECF, and it is due to difference of permittivity of $BaTiO_3\;and\;SrTiO_3$ particles. Dielectric constant of $BaTiO_3\;&\;SrTiO_3$ ECF in high frequency range $(0.5\~10GHz)$ is measured using cavity resonance method. In order to estimate dielectric constant, the reflection coefficient is measured with a network analyzer. Dielectric constant is calculated by observing the frequencies of the resonant cavity modes. About both powders, calculated dielectric constants in this frequency range are about 3/4 of the dielectric constants at 1 MHz. This difference is due to the decrease of the dielectric constant of epoxy matrix. For $BaTiO_3$ ECF, there is the dielectric relaxation at $5\~9GHz$. It is due to changing of polarization mode of $BaTiO_3$ powder. In the case of $SrTiO_3$ ECF, there is no relaxation up to 10GHz. Alternative material for embedded capacitor fabrication is $epoxy/BaTiO_3$ composite embedded capacitor paste (ECP). It uses similar materials formulation like ECF and a screen printing method for film coating. The screen printing method has the advantage of forming capacitor partially in desired part. But the screen printing makes surface irregularity during mask peel-off, Surface flatness is significantly improved by adding some additives and by applying pressure during curing. As a result, dielectric layer with improved thickness uniformity is successfully demonstrated. Using $epoxy/BaTiO_3$ composite ECP, dielectric constant of 63 and specific capacitance of 5.1nF/cm2 were achieved.

• JSTS:Journal of Semiconductor Technology and Science
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• v.11 no.1
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• pp.15-22
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• 2011

Interconnect lines with inter-layer vias are experimentally characterized by using high-frequency S-parameter measurements. Test patterns are designed and fabricated using a package process. Then they are measured using Vector Network Analyzer (VNA) up to 25 GHz. Modeling a via as a circuit, its model parameters are determined. It is shown that the circuit model has excellent agreement with the measured S-parameters. The signal integrity of the lines with inter-layer vias is evaluated by using the developed circuit model. Thereby, it is shown that via may have a substantially deteriorative effect on the signal integrity of high-speed integrated circuits.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.8
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• pp.42-50
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• 2007

This paper presents design methods for dual-frequency(2.4/5.8GHz) active receiving antennas. The proposed active receiving antennas are designed to interconnect the output port of a wideband antenna to the input port of an active device of High Electron Mobility Transistor directly and to receive RF signals of 2.4GHz and 5.2GHz simultaneously where the impedance matching conditions are optimized by adjusting the length of $1/20{\lambda}_0$(@5.8GHz) CPW transmission line in the planar antenna The bandwidth of implemented dual-frequency active receiving antennas is measured in the range of 2.0GHz to 3.1GHz and 5.25GHz to 5.9GHz. Gains are measured of 17.0dB at 2.4GHz and 15.0dB at 5.2GHz. The measured noise figure is 1.5dB at operating frequencies.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.18 no.9
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• pp.1098-1106
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• 2007

This paper presents active antenna diplexers implemented into an ultra-wideband CPW(Coplanar Waveguide) fed monopole antennas. The proposed active antenna diplexer is designed to direct interconnect the output port of a wideband antenna to the input port of two active(HEMT) devices, where the impedance matching conditions of the proposed active integrated antenna are optimized by adjusting CPW(Coplanar Waveguide) feed line to be the length of 1/20 $\lambda_0$(@5.8 GHz) in planar type wideband antenna. The measured bandwidth of the active integrated antenna shows the range from 2.0 GHz to 3.1 GHz and from 5.25 GHz to 5.9 GHz. The measured peak gains are 17.0 dB at 2.4 GHz and 15.0 dB at 5.5 GHz.

• JSTS:Journal of Semiconductor Technology and Science
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• v.5 no.4
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• pp.255-261
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• 2005

With the advent of sub-90nm technologies, the system-on-chip (SoC) and system-in-package (SiP) are becoming the trend in delivering low-cost, low-power, and small-form-factor consumer electronic systems running at multiple GHz. The shortened transistor channel length reduces the transistor switching cycles to the range of several picoseconds, yet the time-of-flights of the critical on-chip and off-chip interconnects are in the range of 10 picoseconds for 1.5mm-long wires and 100 picoseconds for 15mm-long wires. Designers realize the bottleneck today often lies at chip-to-chip interconnects and the industry needs a good model to compute the inductance in these parts of circuits. In this paper we propose a new method for extracting accurate equivalent inductance circuit models for SPICE-level circuit simulations of system-on-chip (SoC) and system-in-package (SiP) designs. In our method, geometrical meshes are created and numerical methods are used to find the solutions for the electromagnetic fields over the fine meshes. In this way, multiple-GHz SoC and SiP designers can use accurate inductance modeling and interconnect optimization to achieve high yields.

• Journal of the Optical Society of Korea
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• v.17 no.1
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• pp.44-49
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• 2013

A transimpedance amplifier (TIA)-optical receiver (Rx) using two intersecting active feedback system with regulated-cascode (RGC) input stage has been designed and implemented for optical interconnects. The optical TIA-Rx chip is designed in a 0.13 ${\mu}m$ CMOS technology and works up to 10 Gbps data rate. The TIA-Rx chip core occupies an area of 0.051 $mm^2$ with power consumption of 16.9 mW at 1.3 V. The measured input-referred noise of optical TIA-Rx is 20 pA/${\surd}$Hz with a 3-dB bandwidth of 6.9 GHz. The proposed TIA-Rx achieved a high gain-bandwidth product per DC power figure of merit of 408 $GHz{\Omega}/mW$.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.6
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• pp.164-171
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• 1996

We report the experimental resutls on AlGaAs/GaAs heterojunction bipolar transistors (HBTs) with carbon-doped base structure. To characterize the output power, load-pull mehtod was employed. By characterizing the devices with HP8510C, we extracted the small-signal equivalent circuit. The HBTs were fabricated employing wet mesa etching and lift-off process of ohmic metals. the implementation of polyimide into the fabriction process was accomplished to obtain the lower dielectric constant resultig in significant reduction of interconnect routing capacitance. The fabricated HBTs with an emitter area of 6${\times}14{\mu}m^{2}$ exhibited current gain of 45, BV$_{CEO}$ of 10V, cut-off frequency of 30GHz and power gain of 1 3dBm. To extract the small signal equivalent circuit, the de-embedded method was applied for parasitic parameters and the calculation of circuit equations for intrinsic parameters.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2000.11a
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• pp.11-11
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• 2000

이동통신기술의 급격한 발달로 고주파회로의 packaging과 interconnect 기술의 고성능화 와 저가격화에 대한 새로운 도전이 요구되고 있다‘ 대부분 기존의 무선통신 부품은 P PCB(Printed Wiring Board)기술을 활용하고 있으나 이러한 기술이 점차로 고주파화되는 경 향을 만족시킬수 없어 새로운 고주파 부품기술이 요구되고 있는 실정이다 .. RF 회로를 구성 하기 위하여 PCB소재의 환경적, 치수안정성 문제를 극복하기 위하여 L TCC(Low T Temperature Cofired Ceramics)기술이 최근 주목을 받고 있다. 차세대 이동통신 기술은 수십 GHz 이상의 고주파특성이 우수하고, 고성능의 초소형의 부품을 저가격으로 제조할수 있으며, 시장의 변화에 기민하게 대처할수 있는 기술이 요구되 고 있으며, 이러한 기술적 필요성에 부합할수 있도록 LTCC 기술이 제안되었다. 이러한 C Ceramic Interconnect 기술은 높은 신뢰성을 바탕으로 fine patterning 기술과 저가의 m metallizing 기술로 가능하게 되었다. 초고주파 통신부품기술은 미국과 유럽 등을 중심으로 G GHz 대역또는 mm wave 대역의 기술에 대하여 치열한 기술개발 경쟁을 벌이고 있으며, 이 러한 고주파 패키징 기술을 바탕으로 미래의 군사, 항공, 우주 및 이동통신 기술에 지대한 영향을 미칠수 있는 기반기술로 자리잡을 전망이다. L LTCC 기술은 기존의 후막혼성기술에 비하여 공정이 단순하고 대량생산이 가능하고 가 격이 비교적 저렴하다. 또한 다층구조로 제작할수 있고, 수동소자를 내장할수 있어 회로의 소형화와 고밀도화가 가능하다. 특히 무선으로 초고속 정보를 처리하기 위하여 이동통신기 기의 고주파화가 빠르게 진행됨에 따라서 고분자재료에 비하여 고주파특성이 우수할뿐아니 라 환경적, 치수안정성이 우수한 세라믹소재플 사용함으로써 고주파 손실율을 저감할 수 있 다 .. LTCC 기술은 후막회로 기술과 tape dielectric 기술이 결합된 기술이다. 표준화된 소재 와 공정기술을 활용하여 저가격으로 고성능소자플 제작할 수 있으며, 전극재료로서 높은 전 도도를 갖고 있는 Ag, Cu, Au 및 Pd! Ag릎 사용함으로써 고주파 손실을 저감시킬 수 있다. L LTCC 기술이 최종적으로 소형화, 고기능 고주파 부품기술로 지속적으로 발전하기 위하여 무수축(Zero shrinkage) 소성기술, 광식각 후막기술 등이 원천기술로서 확립될 수 있어야 하 며, 특히 국내의 이동통신 기술에 대한 막대한 투자에도 불구하고 차세대 이동통신 부품기 술에 대한 개발은 상대적으로 미흡한 실정이므로 국내에 LTCC 관련 소재공정 및 부품소자 기술에 대한 개발투자가 시급히 이루워져야 할 것으로 판단된다. 본 발표에서는 지금까지 국내외 LTCC 기술의 발전과정을 정리하였고, 현재 이 기술의 응용과 소재와 공정을 중심으로한 개발현황에 대하여 조사하였으며, 앞으로 LTCC가 발전 해야할 방향을 제시하고자 한다.