• Proceedings of the KIEE Conference
• /
• 2005.07b
• /
• pp.1506-1508
• /
• 2005

VCO(voltage controlled oscillator) using mobile communication device decides direct characteristics as parts that affect important in stable oscillation and distortion characteristics of system. VCO used 900 MHz band was designed by the transformation of Colpitts circuit form use ADS that consider Q-factor to minimize phase noise. VCO manufactured together evaluation board and voltage control oscillator to FR-4 PCB. VCO experimented chracteristics after control through resonance department tuning. In our research, the designed VCO has 15.5 dBm output level at the bias condition of 6V and 10mA and the operating frequency range of 917 MHz$\sim$937 MHz band. Phase noise is -98.28 dBc/Hz at 1 MHz frequency offset from the carrier.

• Journal of the Korean Society for Precision Engineering
• /
• v.8 no.1
• /
• pp.96-104
• /
• 1991

This study is concerned with the fluid sloshing dampers to suppress the high vibration in the resonance and operating regions. An experimental investigation was conducted to determine the logarithmic decrement, natural frequency, tuning frequency ratio of oscillation of liquids contained in an spherical rigid container. The decay of the vibration amplitude was studied for the range of liquid filling ratio in container. The results of the investigation indicate that the sloshing motion of liquids results in an increase in the available effective damping when the filling ratio is in the region near H/R=1.3-1.6.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
• /
• 2001.11b
• /
• pp.1120-1125
• /
• 2001

A new concept of piezoelectric smart panels for noise reduction in wide band frequencies is proposed and their possibility is experimentally investigated. Multi-mode damping is studied by using a newly proposed tuning method. The proposed panels are based on passive shunt damping methods. This method is based on electrical impedance model and maximizing the dissipated energy at the shunt circuit. four PZT are attached on smart panel for improving performance of transmission noise reduction. 0 prove the concept of piezoelectric smart panels, an acoustic measurement experiment was performed. The smart panels exhibit a good noise reduction in middle and high frequency ranges due to the mass effects of absorbing materials or/and the air gap. The use of piezoelectric smart panel renders noise reduction at resonance frequency. Noise reduction at multiple resonance frequencies is experimentally investigaed.

• Progress in Superconductivity and Cryogenics
• /
• v.10 no.2
• /
• pp.27-29
• /
• 2008

Superconducting RF cavities are being considered for accelerating a proton beam at 700 MHz in the linac of the Proton Engineering Frontier Project (PEFP) and its post-project. Dumbbell fabrication is a mid-process for manufacturing an elliptical superconducting RF cavity. During the dumbbell fabrication, control of the dumbbell length and the $TM010\;{\pi}$ mode frequencies is necessary to build up a desired cavity. A new formula with a perturbation measurement method is used to measure and calculate the frequencies of the individual half-cells of a PEFP low-beta dumbbell, and to tune the frequency and length of the half-cells. In this article, the tuning method and results of the PEFP low-beta dumbbells have been presented.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.30 no.10A
• /
• pp.971-978
• /
• 2005

In this paper, we design and fabricate a VCO(Voltage Controlled Oscillator) for radar detector of X/K/Ka band using frequency multiplier. The existing VCO operated in radar detector have many Problems such as narrow bandwidth, slow frequency variable rate, unstable of production due to high frequency. So we design and fabricate a VCO improved such problems using frequency multiplier. As a result of measure, investigated frequency multiple VCO show its output power 3.64 dBm at multiplied operating frequency 11.27 GHz and have wide frequency tuning range of 660 MHz by controlled voltage 0V to 4.50 V applied diode. And also its phase noise is -104.0 dEc at 1 MHz offset frequency so we obtain suitable performance for commercial use.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.27 no.6C
• /
• pp.619-624
• /
• 2002

In this paper, a novel architecture of programmable divider with fifty percent duty cycle output and programmable dividing number has been proposed. Through HSPICE simulation, a 900MHz frequency synthesizer with proposed (sequency divider has designed in a standard 0.25㎛ CMOS technology To verify the operation of proposed frequency divider, a chip had been fabricated using 0.65㎛ 2-poly, 3-metal standard CMOS processing and experimental result shows that the proposed frequency divider works well. The designed voltage controlled oscillator(VCO) has a center frequency of 900MHz a tuning range of $\pm$10%, and a gain of 154HHz/V. The simulated frequency synthesizer performance has a settling time of 1.5$\mu$s, a frequency range from 820MHz to IGHz and power consumption of 70mW at 2.5V power supply voltage.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.27 no.5C
• /
• pp.500-505
• /
• 2002

In this paper, a novel architecture of programmable divider with fifty percent duty cycle output and programmable dividing number has been proposed. Through HSPICE simulation, a 900MHz frequency synthesizer with proposed frequency divider has designed in a standard 0.25$\mu\textrm{m}$ CMOS technology. To verify the operation of proposed frequency divider, a chip had been fabricated using 0.65$\mu\textrm{m}$ 2-poly, 3-metal standard CMOS processing and experimental result shows that the proposed frequency divider works well. The designed voltage controlled oscillator(VCO) has a center frequency of 900MHz, a tuning range of ${\pm}$10%, and a gain of 154MHz/V. The simulated frequency synthesizer performance has a settling time of 1.5${\mu}\textrm{s}$, a frequency range from 820MHz to 1GHz and power consumption of 70mW at 2.5V power supply voltage.

• Journal of the Korea institute for structural maintenance and inspection
• /
• v.21 no.6
• /
• pp.113-125
• /
• 2017

In spite of bulk literature about the tuning of TMD, the effectiveness of TMD in reducing the seismic response of engineering structures is still in a row. This paper deals with the optimum tuning parameters of a passive TMD and simulated on MATLAB with a ten-story numerical shear building. A weighted multi-objective optimization method based on computer experiment consisting of coupled with central composite design(CCD) central composite design and response surface methodology(RSM) was applied to find out the optimum tuning parameters of TMD. After the optimization, the so-conceived TMD turns out to be optimal with respect to the specific seismic event, hence allowing for an optimum reduction in seismic response. The method was employed on above structure by assuming first the El Centro seismic input as a sort of benchmark excitation, and then additional recent strong-motion earthquakes. It is found that the RSM based weighted multi-objective optimized damper improves frequency responses and root mean square displacements of the structure without TMD by 31.6% and 82.3% under El Centro earthquake, respectively, and has an equal or higher performance than the conventionally designed dampers with respect to frequency responses and root mean square displacements and when applied to earthquakes.

• Korean Journal of Optics and Photonics
• /
• v.16 no.1
• /
• pp.85-98
• /
• 2005

As the number of compound cavity modes within the stopband of DFB sections decreases, the frequency of mode hopping decreases for the variation of $\Delta$λ$_{B}$, which represents the difference between the Bragg wavelengths of two DFB sections, so that the number of abrupt changes of pulsation frequencies decreases. In addition, the pulsation frequency varies continuously for the variation of the phase in a phase tuning section for a fixed $\Delta$λ$_{B}$. The number of compound cavity modes within the stopband decreases as the length of DFB sections increases and the length of a phase tuning section decreases. Thus stable self-pulsation operations for the variation of $\Delta$λ$_{B}$ and the phase in a phase tuning section could be obtained by proper selection of the coupling strength and the length of each section.ction.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.39 no.7
• /
• pp.7-15
• /
• 2002

The digital DBS tuner is designed and implemented in a CMOS process using a direct-conversion architecture that offers a high degree of integration. To generate mathched LO I/Q quadrature signals covering the total input frequency range, a fully integrated ring oscillator is employed. And, to decrease a high level of phase noise of the ring oscillator, a frequency synthesizer is designed using a double loop strucure. This paper proposes and verifies a band selective loop for fast frequency switching time of the double loop frequency synthesizer. The down-conversion mixer with source follower input stages is used for low voltage operation. An experiment implementation of the frequency synthesizer and mixer with integrated a 0.25um CMOS process achieves a switching time of 600us when frequency changes from 950 to 2150MHz. And, the experiment results show a quadrature amplitude mismatch of max. 0.06dB and a quadrature phase mismathc of max. >$3.4^{\circ}$.