• Proceedings of the IEEK Conference
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• 2002.06b
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• pp.365-368
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• 2002

WSW(Wrap Side Wall) is proposed to decrease junction electric field in this paper. WSW process is fabricated after first gate etch, followed NMI ion implantation and deposition & etch nitride layer New WSW structure has buffer layer to decrease electric field. Also we compared the hot carrier characteristics of WSW and conventional. Also, we design a test pattern including pulse generator, level shifter and frequency divider, so that we can evaluate AC hot carrier degradation on-chip.

• Proceedings of the KIPE Conference
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• 1998.07a
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• pp.158-161
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• 1998

A precision high voltage generator for ion injection is implemented on HFZVS-PSCI (High Frequency Zero-Voltage-Switching Phase-Shift-Controlled Inverter). Some practical aspects of implementing precision high voltage generator with HFZVS-PSCI, such as a HFHV transformer, multiflier, and precision CR divider are discussed. The results show that the generator under the Phase-Shift-Controller has a fast dynamic response, low ripple voltage, and high accuracy.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.987-988
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• 2006

This paper presents a design and MPW implementation of 3D Graphics Floating Point IPs. Designed IPs include adder, subtractor, multiplier, divider, and reciprocal unit. The IPs have pipelined structures. The IPs meet the accuracy required in OpenGL ES. The operation frequency of the IPs is 100MHz. The IPs can be efficiently used in 3D graphics accelerators.

• Proceedings of the IEEK Conference
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• 2002.06a
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• pp.447-450
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• 2002

In this paper, we present design methods for a series-fed microstrip patch array operating at X-band frequency. The array consists of 18 rectangular patches connected to 3 quarter-wave impedance transformers. The power divider is designed for the uniform element excitation. The element excitation is then made to be tapered by increasing the input impedance of elements located at array edges. The designed antenna is fabricated and tested. Results of test show a fair agreement with the prediction.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.4A
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• pp.247-255
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• 2003

In this paper, an $tan^{-1}$ circuit for the frequency synchronization of OFDM based IEEE 802.11a is presented. The proposed circuit consists of a divider, an $tan^{-1}$ ROM and a phase detector, which can detect frequency offset within 0.0491 rad. The circuit implemented with FPGA shows a pull-in range of under ${\pm}625KHz$ at 5dB AWGN. It may be useful for IEEE 802.11a WLAN standard.

• Proceedings of the KIEE Conference
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• 2007.07a
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• pp.1711-1712
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• 2007

액체탱크의 레벨을 정밀측정하는 데 FMCW(Frequency Modulated Continuous Wave)를 이용하고자 한다. 우리는 1GHz 대역폭으로 Sweep하는 Frequency Source Module을 개발하여 테스트 중이다. 개발한 송수신 모듈은 주파수의 송수신을 위한 주요부품들로 구성되는데, VCO(Voltage Controlled Oscillator), 서큘레이터(Circulator), 필터(Filter), 전력분배기(Power Divider), PLL(Phase Locked Loop)제어부, 믹서, 증폭기 등이 그것이다. 이들 부품들이 위치한 RF Board와, 패치로 구성한 안테나를 이용하여 마이크로웨이브 신호를 송수신할 수 있으며, 송수신한 신호 간의 차주파수(beat frequency)성분을 측정하면 거리정보를 획득할 수 있다. 차주파수의 아날로그신호는 DSP를 이용하여 FFT를 수행하여 주파수 성분을 찾아 거리계산을 하도록 개발하였다. 거리 측정의 성능에 영향을 미치는 가장 큰 요소는 안정된 주파수를 만들어 낼 수 있느냐 하는 것이다. 본 논문에서는 제작한 VCO 모듈을 비롯한 개발 중인 각 모듈들을 소개하였다. 향후 VCO의 선형성 개선과, 난반사에 대한 Echo Cancel 알고리듬을 적용하여 제품의 상용화를 목표로 한다.

• Proceedings of the Optical Society of Korea Conference
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• 1989.02a
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• pp.152-156
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• 1989

Parameters of a microstrip patch antenna such as the resonant frequency, radiation conductance, and the bandwidth are calculated. The rectangular microstrip patch antenna fed by a microstrip transmission line is fabricated and its resonant frequency, radiation pattern, and input voltage standing wave ratio are measured. The measured resonant frequency for 13.0mm$\times$9.7mm copper clad woven PTFE/glass laminate plate is 9.06Ghz, where the calculative is 9.00Ghz. And the measured vswr shows that the bandwidth of the antenna is 225MHz for vswr less then 2.0 which the calculated quality factor of the patch gives the bandwidth OF 280ghZ. The measured radiation pattern for 5 element as well as 4 element patch array shows less then 4dB deviation in the first side lobes from the designed values for both E and H plane pattern. This diviation is believed to be the power division errors of the power divider.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.2B
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• pp.145-150
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• 2002

This paper presents an implementation methodology of unified PCS base station system which, is capable of providing PCS services for 3 PCS carriers concurrently. We have built up an unified PCS BTS using a unification module, which is consisted of a multi-channel combiner, duplexer, LNA, power divider, feeder line, and a common set of antennas. PCS unification module is featured with wide-band and high power handling capability and electrical characteristics like insertion loss, isolation have been greatly improved. It was shown that performance of the system in terms of Ec/Io and mobile receive power within the total 30MHz PCS frequency range is uniformly acceptable and measured signal quality and coverage are equivalent to that of the individual PCS base station.

• International Journal of Internet, Broadcasting and Communication
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• v.10 no.3
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• pp.109-114
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• 2018

In order to improve performance for the size of the BLPD, the CCL is used for the realization as the delay line. As realizing lower coupling coefficient and lower characteristic impedance, the CCL has good performance of the phase delay. The CCL is applied as the compact BLPD with optimized coupling factor and matched impedance because the lower coupling coefficient and lower characteristic impedance are increased the size and the loss, respectively. Designed BLPD using the CCL has the size of $0.13{\lambda}_g{\times}0.13{\lambda}_g$ and the size-reduction ratio of fabricated BLPD using the CCL has 58.5% ($21.08{\times}21.40mm^2$). Also, fabricated BLPD is measured the insertion loss of 3.16dB at the center frequency of 1.78GHz and the 20dB bandwidth is 9.58%. Differenced magnitude and phase between threw port and coupled port are measured 0.1dB and $89.9^{\circ}$, respectively. These performances are almost same compared with the conventional BLPD. Suggested application of the CCL can be used various devices and circuits for the size-reduction.

• The Proceeding of the Korean Institute of Electromagnetic Engineering and Science
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• v.6 no.1
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• pp.28-36
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• 1995

In this paper, a design method of multiple n-way low loss power divider for x-band is propossed. To decrease loss, only two-stages of transmission lines are used with isolation resistors for match. Ex- perimental results for 3-way and 4-way power dividers have the divided power of 5.54~6.17dB and 6.76~7.37 dB, the return loss of more than 17dB and 12dB, and the isolation of more than 18dB and 10dB at center frequency, respectively, The measured results show good agreement with the theoretical analysis.