• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.27 no.3
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• pp.79-86
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• 2013

In order to analyze the electrical performance of ZnO surge arresters stressed by the combined DC and AC voltages that are generated in DC/AC converter systems, the leakage current properties of ZnO surge arrester blocks deteriorated by impulse currents were investigated. The test specimens were deteriorated by the 8/$20{\mu}s$ impulse current of 2.5kA and the leakage currents flowing into the deteriorated zinc oxide(ZnO) arrester blocks subjected to the combined DC and power frequency AC voltages are measured. As a result, the leakage currents flowing through deteriorated ZnO surge arrester blocks were higher than those flowing through the fine ZnO surge arrester blocks and the larger the injection number of 8/$20{\mu}s$ impulse current of 2.5kA is, the greater the leakage current is. The leakage current-voltage curves(I-V curves) of the fine and deteriorated ZnO surge arrester blocks stressed by the combined DC and AC voltages show significant difference in the low conduction region. Also the cross-over phenomenon is observed at the voltage close to the knee of conduction on plots of I-V curves.

• Proceedings of the KIEE Conference
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• 2002.07b
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• pp.1196-1198
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• 2002

A novel single-stage half-bridge high frequency resonant inverter using ZVS(Zero Voltage Switching) with high input power factor suitable for induction heating applications is presented in this paper. The proposed high frequency resonant inverter integrates half-bridge boost rectifier as power factor corrector(PFC) and half-bridge resonant inverter into a single stage. The input stage of the half-bridge boost rectifier is working in discontinuous conduction mode (DCM) with constant duty cycle and variable switching frequency. So that a high power factor is achieved naturally. Simulation results through the Pspice have demonstrated the feasibility of the proposed inverter. This proposed inverter will be able to be practically used as a power supply in various fields as induction heating applications, DC-DC converter etc.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.6 no.2
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• pp.151-158
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• 2002

In this paper, Phase locked microwave oscillator having the low phase noise and high stability for digital MMDS down converter was designed. we have been analyzed the low phase noise properties by the active device nonlinear equivalent circuits and derived the necessary and sufficient conditions for high stable voltage control oscillator. And it is applied to phase locked loop, we design the phase locked microwave oscillator of frequency synthesizer. Experimental results of designed phase locked oscillator shows -85dBc/Hz @ 10KHz phase noise properties and simulation result is -90Bc/Hz @ 10kHz respectively we shows that proposed low phase noise and stable conditions of phase locked microwave oscillator can be applied to design the high stable digital MMDS frequency synthesizer.

• Journal of Power Electronics
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• v.12 no.2
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• pp.317-325
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• 2012

Resonant immittance converter (RIC) topologies can transform a current source into a voltage source (Type-I RICs) and vice versa (Type-II RICs), thereby making them suitable for many power electronics applications. RICs are operated at a fixed frequency where the resonant immittance network (RIN) exhibits immittance conversion characteristics. It is observed that the low-frequency response of Type-II RINs is relatively flat and that the state variables associated with Type-II RINs affect the response only at the high frequencies in the vicinity of the switching frequency. The overall response of a Type-II RIC is thus dominated by the filter response, which is particularly important for the controller design. Therefore, an approximate equivalent circuit model and a small-signal model of Type-II RICs are proposed in this paper, neglecting the high-frequency response of Type-II RINs. While the proposed models greatly simplify and speed-up the analysis, it adequately predicts the open-loop transient and small-signal ac behavior of Type-II RICs. The validity of the proposed models is confirmed by comparisons of their results with those obtained from a cycle-by-cycle simulation and with an experimental prototype.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.4
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• pp.272-281
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• 2013

This paper presents low power frequency shift keying (FSK) transmitter using all digital PLL (ADPLL) for smart utility network (SUN). In order to operate at low-power and to integrate a small die area, the ADPLL is adopted in transmitter. The phase noise of the ADPLL is improved by using a fine resolution time to digital converter (TDC) and digitally controlled oscillator (DCO). The FSK transmitter is implemented in $0.18{\mu}m$ 1-poly 6-metal CMOS technology. The die area of the transmitter including ADPLL is $3.5mm^2$. The power consumption of the ADPLL is 12.43 mW. And, the power consumptions of the transmitter are 35.36 mW and 65.57 mW when the output power levels are -1.6 dBm and +12 dBm, respectively. Both of them are supplied by 1.8 V voltage source. The frequency resolution of the TDC is 2.7 ps. The effective DCO frequency resolution with the differential MOS varactor and sigma-delta modulator is 2.5 Hz. The phase noise of the ADPLL output at 1.8 GHz is -121.17 dBc/Hz with a 1 MHz offset.

• Journal of Advanced Navigation Technology
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• v.21 no.3
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• pp.220-229
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• 2017

In this paper, To take advantage a variety of DC power as the boost DC-DC converter design specifications through the inductor L and capacitor C through PSPICE to calculate the best estimate of the value. Boost DC-DC converter with a switch device using IRF840 and reverse recovery time Schottky diodes with excellent with constant current controller using D10SC6M and resistance can be configured to considering the Power LED Module was driven by the production. Converter's switching frequency is 50 kHz, the first Duty Rate was made to increase gradually depending on the value of the detection were, 10 % in the output voltage. As a result, the simulated Boost Power LED driver characteristics is in comparison with the design specifications, 5% or less as the error was approximated. Finally, when input 15 V were offered, a stable output 24 V were obtained. and Dimming Control through the adjustment of brightness and current consumption were possible.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.5A
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• pp.504-512
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• 2010

The paper proposes the 6bit 800MS/s flash A/D converter that can be applied to wireless USB chip-set. The paper simplified the error correction circuit and synchronization block as one circuit which are used respectively, and furthermore reduced the burden on the hardware. Comparing to the conventional error correction circuit, the proposed error correction circuit in this paper reduced 5 MOS transistors, the area of each error correction circuit is reduced by 9%. The A/D converter is fabricated with 0.18um CMOS 1-poly 6-metal process, and power dissipation is 182mW at 0.8Vpp input range and 1.8V supply voltage. The measured result shows 4.0bit of ENOB at 800MS/s conversion rate and 128.1MHz input frequency.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.10
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• pp.7-14
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• 2008

In this paper, we designed the HVIC(High Voltage Gate Driver IC) which has improved noise immunity characteristics and high driving capability. Operating frequency and input voltage range of the designed HVIC is up to 500kHz and 650V, respectively. Noise protection and schmitt trigger circuit is included in the high-side level shifter of designed IC which has very high dv/dt noise immunity characteristic(up to 50V/ns). And also, rower dissipation of high-side level shifter with designed short-pulse generation circuit decreased more that 40% compare with conventional circuit. In addition, designed HVIC includes protection and UVLO circuit to prevent cross-conduction of power switch and sense power supply voltage of driving section, respectively. Protection and UVLO circuit can improve the stability of the designed HVIC. Spectre and Pspice circuit simulator were used to verify the operating characteristics of the designed HVIC.

• The Transactions of the Korean Institute of Power Electronics
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• v.21 no.5
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• pp.373-380
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• 2016

In this paper, a 50-kW high-efficiency modular fast charger for both electric vehicle (EV) and neighborhood electric vehicle (NEV) is proposed. The proposed fast charger consists of five 10-kW modules to achieve fault tolerance, ease of thermal management, and reduce component stress. Three-level topologies for both AC-DC and DC-DC converters are employed to use 600V MOSFET, resulting in ease of component selection and increase in switching frequency. The proposed three-level DC-DC converter with coupled inductor and its hybrid switching method can reduce the circulating current under wide output voltage range. A 50-kW prototype of the proposed fast charger was developed and tested to verify the validity of the proposed concept. Experimental results show that the proposed fast charger achieves a rated efficiency of 95.2% and a THD of less than 3%.

• The Transactions of the Korean Institute of Power Electronics
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• v.21 no.4
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• pp.302-311
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• 2016

This paper proposes a hybrid ESS that integrates an energy storage system (ESS) with an uninterruptible power supply (UPS). The hybrid ESS has a demand management and emergency power supply function while increasing the battery utilization of the UPS, which has just been used in a power failure. In addition to the critical load, the proposed system augments the capacity of emergency generation using an additional load, which has voltage and frequency-dependent characteristics to the grid side. The control algorithm of the AC-DC converter and bidirectional DC-DC converter is proposed for demand management and emergency power supply. Furthermore, seamless and autonomous transfer methods to alleviate the transient during mode transfer are proposed. To validate the proposed control scheme, experimental results from a 5 kW prototype are provided.