• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.15 no.5
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• pp.451-460
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• 2004

The pilot bit pattern of W-CDMA system is used for the channel estimation and frame synchronization confirmation. This paper proposes the binary sequences for the frame synchronization for wideband code division multiple access (W-CDMA) system. We present the circuit for the generation of ideal frame synchronization property using the binary sequences called frame synchronization word(FSW). W-CDMA system uses compressed mode where up to 7 slots per one 10 msec frame are not transmitted to make measurements from another frequency without a full dual receiver terminal. It is shown that the proposed frame synchronization words also maintain the optimal frame synchronization property in the compressed mode by using the complementary mapping relationship of preferred pair. And we discuss the realization circuit for the generation of frame synchronization words by using the concept of preferred pairs, complementary mapping relationship, and maximal length sequence.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.17 no.3 s.106
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• pp.272-279
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• 2006

In this paper, we evaluate the performance of frame synchronization words of pilot bit patterns which are used for the channel estimation and frame synchronization confirmation in W-CDMA(Wide band Code Division Multiple Access) system. W-CDMA system also uses compressed mode to make measurements from another frequency without a full dual receiver terminal. It is confirmed by using computer simulation that the proposed frame synchronization words also maintain the frame synchronization property in the compressed mode by using the complementary mapping relationship of preferred pair ROC(Receiver Operating Characteristic) curves with probability of detection and false alarm are used to analized the performance of the proposed frame synchronization words by using the various detection metrics such as LLRT(Log Likelyhood Ratio Test), GLRT(Generalied Likelyhood Ratio Test), soft and hard correlation tests in AWGN and Rayleigh fading channels. It is expected that the research results fer the performance of pilot bit patterns of this paper can be useful reference for the design and implementation of frame synchronization in 3rd generation W-CDMA system.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.10C
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• pp.951-962
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• 2002

A DMT transceiver recovers the sampling time from reserved sub-carriers, the pilots. Since the pilots are available after the FFT, the symbol synchronization must be done before sample synchronization. In DMT VDSL system, symbol synchronization is handled separately from sample synchronization, although the two processes are intimately related. The DMT symbol itself contains sufficient information, the cyclic extension, for symbol synchronization. Using only the sign bit of received signal, the Maximum Likelihood Estimation solution is derived. The Tx windowing in the transmitter of DMT VDSL system results in the blurring of MLE peaks. We propose the weighted summing MLE method using the sign bit which produces the clearly sharp top of MLE peaks. The stability of symbol synchronization is improved significantly by averaging over a few symbols. This paper presents the study of the original MLE and the weighted summing MLE using sign bit. A clock difference between transmitter and receiver destroys the oahogonality of the carriers. Therefore, a receiver using asynchronous sampling must perform timing correction in the discrete-time domain. We introduce an efficient digital sample synchronization method which is based on temporal and frequency domain digital signal processing.

• Journal of Broadcast Engineering
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• v.21 no.6
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• pp.899-912
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• 2016

In ATSC 3.0 systems, a bootstrap signal is located at the start of each frame. In this paper, we propose an initial synchronization scheme for ATSC 3.0 systems using the bootstrap signal. The bootstrap signal of ATSC 3.0 has several repetition patterns in the time domain. By utilizing the repetition patterns within the bootstrap, the proposed scheme can obtain an initial synchronization at the receiver. Also, simulation results show that the proposed scheme can obtain an initial synchronization at very low signal-to-noise ratios.

• ETRI Journal
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• v.34 no.2
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• pp.175-183
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• 2012

Conventional synchronization algorithms for impulse radio require high-speed sampling and a precise local clock. Here, a phase-locked loop (PLL) scheme is introduced to acquire and track periodical impulses. The proposed impulse PLL (iPLL) is analyzed under an ideal Gaussian noise channel and multipath environment. The timing synchronization can be recovered directly from the locked frequency and phase. To make full use of the high harmonics of the received impulses efficiently in synchronization, the switching phase detector is applied in iPLL. It is capable of obtaining higher loop gain without a rise in timing errors. In different environments, simulations verify our analysis and show about one-tenth of the root mean square errors of conventional impulse synchronizations. The developed iPLL prototype applied in a high-speed ultra-wideband transceiver shows its feasibility, low complexity, and high precision.

• Proceedings of the Korea Committee for Ocean Resources and Engineering Conference
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• 2003.05a
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• pp.336-340
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• 2003

The frame synchronization should be acquired before performing other data-aided receiving algorithms, such as data-aided channel equalizing, beam-forming and phase, symbol timing, and frequency synchronizing, since all of them are using preamble or training sequence to estimate the amount of error from the received signal. In this paper, we present a new frame synchronization scheme for underwater ultrasonic image burst transmission system, which computes the correlation between received symbol sequence and one CAZAC sequence, composed of the latter half of the first CAZAC sequence of preamble and the first half of the second CAZAC sequence of preamble and then compares a threshold value. If the correlation value is bigger than the threshold value, the frame detector determines that the frame synchronization is achieved at that sample.

• Journal of Power Electronics
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• v.16 no.3
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• pp.1067-1075
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• 2016

This paper presents an adaptive observer-based approach to estimate voltage parameters, including frequency, amplitude, and phase angle, for single-phase power systems. In contrast to most existing estimation methods of grid voltage parameters, in this study, grid voltage is treated as a dynamic system related to an unknown grid frequency. Based on adaptive observer theory, a full-order adaptive observer is proposed to estimate voltage parameters. A Lyapunov function-based argument is employed to ensure that the proposed estimation method of voltage parameters has zero steady-state error, even when frequency varies or phase angle jumps significantly. Meanwhile, a reduced-order adaptive observer is designed as the simplified version of the proposed full-order observer. Compared with the frequency-adaptive virtual flux estimation, the proposed adaptive observers exhibit better dynamic response to track the actual grid voltage frequency, amplitude, and phase angle. Simulations and experiments have been conducted to validate the effectiveness of the proposed observers.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.7A
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• pp.725-733
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• 2006

In this paper, we propose an algorithm which makes the frequency of output signal synchronize with frequency of input signal in Equalization Digital On-channel Repeater (EDOCR) system which was proposed to overcome the disadvantage of conventional Digital On-Channel Repeater (DOCR). Also, we verify the algorithm by using the mathematical equivalent model and analysis the performance by implying the algorithm to EDOCR. The main idea is to use the frequency offset information, which comes from carrier recovery in the receiving part of EDOCR, when the demodulated symbol is re-modulated in transmitting part. Based on the proposed algorithm, EDOCR not only makes the output signal synchronized with input signal in frequency but also emit the output signal which satisfies the ATSC transmission standard without additional equipments such as Global Positioning System (GSP).

• Journal of the Korea Institute of Military Science and Technology
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• v.14 no.1
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• pp.114-122
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• 2011

In this paper, we have identified the system instability factors in a bistatic radar system using pulse chasing and considered their effects on the bistatic receiver's MTI(Moving Target Indication) improvement performance. The pulse chasing is a method to efficiently scan a restricted search area within the limited transmitter power and time in a bistatic radar and to track a series of transmitted pulses using the receiver beam which has ideally matched to the pulse propagation rate. In this paper, we have discussed the interrelationship between the pulse chasing and time and frequency/phase synchronization and described the effects of the identified system instability factors on two kinds of MTI filter configuration, single delay-line and double delay-line, in the bistatic radar. And also, we have confirmed that the overall system improvement is restricted by a lower improvement factor among identified them, and discussed the allowable tolerance of the time and frequency/phase synchronization in the bistatic system.

• Journal of Positioning, Navigation, and Timing
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• v.5 no.3
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• pp.157-163
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• 2016

Clocks for time synchronization using radio signals such as global navigation satellite system (GNSS) may lose reference signals by intentional or unintentional jamming. This is called as holdover. When holdover occurs, a clock goes into free run in which synchronization performance is degraded considerably. In order to maintain the required precise time synchronization during holdover, accurate estimation on main parameters such as frequency offset and frequency drift is needed. It is necessary to implement an optimum filter through various simulation tests by creating clock noise in accordance with given specifications in order to estimate the main parameters accurately. In this paper, a method that creates clock noise in accordance with given specifications is described.