• Korean Journal of Optics and Photonics
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• v.16 no.1
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• pp.21-26
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• 2005

10 GHz clock recovery from 40 Gbit/s optical time-division-multiplexed(OTDM) signal pulses was experimentally demonstrated using an optical phase lock loop based on a terahertz optical asymmetric demultiplexer(TOAD) with a local-reference-oscillator-free electronic feedback circuit. The 10 GHz clock was successfully extracted from 40 Gbit/s signals. The SNR of the time-extracted 10 GHz RF signal to the side components was larger than 40 dB. Also we performed numerical simulation about the extraction process of phase information in TOAD. The lock-in frequency range of the clock recovery is found to be 10 kHz.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.2
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• pp.245-249
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• 2004

In this paper, we have proposed a clock recovery algorithm of Orthogonal Frequency Division Multiplexing/Quadrature Phase Shift Keying Modulation-Digital Microwave Radio(OFDM/QPSK-DMR) system using Band Limited-Pulse Shaping Filter(BL-PSF) and compared the clock phase error variance of OFDM/QPSK-DMR system with that of single carrier DMR system. The OFDM/QPSK-DMR system using windowing method requires training sequence or Cyclic Prefix (CP) to synchronize the clock phase of received signal. But transmit efficient is increased in our proposed DMR system because of no using redundant data such as training sequence or CP. The proposed clock recovery algorithm is simply realized in the OFDM/QPSK-DMR system using BL-PSF. The simulation results confirm that the proposed clock recovery algorithm has the same clock phase error variance performance in a single carrier DR system under Additive White Gaussian Noise(AWGN) environment.

• Journal of The Korean Society of Integrative Medicine
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• v.11 no.4
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• pp.281-289
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• 2023

Purpose : In this study, we aimed to determine how frequencies different of repetitive transcranial magnetic stimulation applied to the less affected contalesional corticomotor area affect upper extremity motor function in patients with acute stroke within 3 months of onset. By doing so, we aimed to propose a new method of rTMS intervention based on the degree of damage and recovery status of the patient, rather than the generalized rTMS intervention that has been used uniformly. Methods : The rTMS intervention was applied on the contralesional side of the cerebral hemisphere damage. 15 subjects in the HF-rTMS group, 12 subjects in the LF-rTMS group, and 14 subjects in the SF-rTMS group were randomized to receive the rTMS intervention in each group for a total of 10 sessions on five consecutive weekdays for two weeks, and underwent FMA-U to determine changes in upper extremity function following the intervention in each group. FMA-U was performed within 24 hours before and after the rTMS intervention. Results : When the FMA-U was performed to determine the pre- and post-intervention changes in upper extremity motor function within the groups, no statistically significant differences were found in the SF-rTMS group before and after the intervention, but significant statistical differences were found in the HF-rTMS group (p=.006) and the LF-rTMS group (p=.020), with greater significance in the HF-rTMS group than the LF-rTMS group. Conclusion : This study confirmed that compensatory action by activating the less affected contralesional corticomotor area based on the bimodal balance-recovery model can support upper extremity recovery patients with acute stroke within 3 months of onset, depending on the degree of damage level and recovery status. Therefore, the results of the contralesional HF-rTMS application in this study may provide a basis for proposing a new rTMS intervention for upper extremity recovery in stroke patients.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.38 no.4
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• pp.11-17
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• 2001

In this paper, we propose a polarity decision carrier recovery algorithm for high order QAM(Quadrature Amplitude Modulation), which has robust and large frequency acquisition performance in the high order QAM modem. The proposed polarity decision PD(Phase Detector) output and its variance characteristic are mathematically derived and the simulation results are compared with conventional DD(Decision-Directed) method. While the conventional DD algorithm has linear range of $3.5^{\circ}{\sim}3.5^{\circ}$, the proposed polarity decision PD algorithm has linear range as large as $-36^{\circ}{\sim}36^{\circ}$ at ${\gamma}-17.9$. The conventional DD algorithm can only acquire offsets less than ${\pm}10\;KHz$ in the case of the 256 QAM while an analog front-end circuit generally can reduce the carrier-frequency offset down to only ${\pm}100\;KHz$. Thus, in this case additional AFC or phase detection circuit for carrier recovery is required. But by adopting the proposed polarity decision algorithm, we can find the system can acquire up to ${\pm}300\;KHz$at SNR = 30dB without aided circuit.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.9A
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• pp.858-866
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• 2005

This paper proposes the method of frequency synchronization using the spectrum correlation in ATSC terrestrial DTV system. If the spectrum around pilot is severely distorted by multipath or mobile reception environment, the conventional algorithm using the pilot signal makes the estimation error of the frequency offset. Because the proposed algorithm acquires frequency synchronization using the correlation between the received specalm and the standard spectrum without the use of pilot, the proposed method can acquire frequency synchronization faster and more accurate than conventional algorithm. And this paper proposes new method for ATSC frequency synchronization without the use of pilot.

• Journal of Power Electronics
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• v.6 no.1
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• pp.73-82
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• 2006

Plasma display panels (PDPs) have a serious thermal problem, because the luminance efficiency of a conventional PDP is about 1.5 1m/W and it is less than $3\~5\;lm/W$ of a cathode ray tube (CRT). Thus there is a need for improving the luminance efficiency of the PDP. There are several approaches to improve the luminance efficiency of the PDP and we adopted a driving PDP at high frequency range from 400kHz up to over 700kHz. Since a PDP is regarded as an equivalent inherent capacitance, many types of sustaining drivers have been proposed and widely used to recover the energy stored in the PDP. However, these circuits have some drawbacks for driving PDPs at high frequency ranges. In this paper, we investigate the effect of the parasitic components on the PDP itself and on the driver when the reactive energy of the panel is recovered. Various drivers are classified and evaluated based on their suitability for high frequency drivers. Finally, a current-fed driver with a DC input voltage bias is proposed. This driver overcomes the effect of parasitic components in the panel and driver. It fully achieves a ZVS of all full-bridge switches and reduces the transition time of the panel polarity. It is tested to validate the high frequency sustaining driver and the experimental results are presented.

• Journal of electromagnetic engineering and science
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• v.4 no.2
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• pp.72-78
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• 2004

In this paper, we evaluate the performance of the digital modulation schemes described in the APCO Project 25 FDMA specifications which can be used for applying the ultra-narrowband technology to the current domestic simple two-way radio systems, and discuss difficulties in the DSP implementation of the systems. We analyze the effect on the systems' BER performance of receiver non-matched filter and frequency-offset between the transmitter and receiver oscillators. And we present a frequency offset compensation method for improving the system performance. The results of performance analysis showed that the CQPSK of APCO Project 25 using non-matched filter degraded the BER by 0.5～1.0 ㏈ comparing with PI/4 DQPSK using matched filter. In the event of 2 % frequency offset, about 1 ㏈ performance loss was produced at the BER of $$10^{-3}TEX>. With the frequency-offset compensation method implemented in the systems using phase recovery scheme of PSK synchronization detection, the performance degradation of about 1.0 ㏈ was occurred at the BER of $$10^{-3}TEX> for 10 % of frequency offset. The proposed method can be used for the improvement of system performance.

• Nuclear Engineering and Technology
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• v.30 no.6
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• pp.531-540
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• 1998

The DYLAM-3 code which overcomes the limitation of event tree/fault tree was applied to LOOP (Loss of Off-site Power) in the mid-loop operation employing HEPs (Human Error Probabilities) supplied by the ASEP (Accident Sequence Evaluation Program) and the SEPLOT (Systematic Evaluation Procedure for Low power/shutdown Operation Task) procedure in this study. Thus the time history of core uncovery frequency during the mid-loop operation was obtained. The sensitivity calculations in the operator's actions to prevent core uncovery under LOOP in the mid-loop operation were carried out. The analysis using the time dependent HEP was performed on the primary feed & bleed which has the most significant effect on core uncovery frequency. As the result, the increment of frequency is shown after 200 minutes duration of simulation conditions. This signifies the possibility of increment in risk after 200 minutes. The primary feed & bleed showed the greatest impact on core uncovery frequency and the recovery of the SCS (Shutdown Cooling System) showed the least impact. Therefore the efforts should be taken on the primary feed & bleed to reduce the core uncovery frequency in the mid-loop operation. And the capability of DYLAM-3 in applying to the time dependent concerns could be demonstrated.

• The Transactions of the Korean Institute of Power Electronics
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• v.22 no.1
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• pp.36-43
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• 2017

This paper describes a hybrid multi-output three-level DC/DC converter suitable for a wide, high-input voltage range of an auxiliary power supply for a high-power photovoltaic generating system. In a high-power photovoltaic generating system, the solar panel output voltage depends on solar radiation quantity and varies from 450Vdc to 1100Vdc. The proposed hybrid multi-output three-level DC/DC converter, which is an auxiliary power supply, would be used as power source for control printed circuit boards and relay and cooling fans in a high-power photovoltaic generating system. The proposed multi-output ($24V_{DC}/30A$, $230V_{DC}/5A$) hybrid three-level boost converter, which uses an energy recovery snubber, is controlled by variable-frequency and phase-shifted modulations and can achieve zero-voltage switching with all operating conditions of input voltage and load range. Experimental results of a 2kW prototype are evaluated and implemented to verify the performance of the proposed converter.

• JSTS:Journal of Semiconductor Technology and Science
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• v.12 no.3
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• pp.341-352
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• 2012

This paper presents a Processing Engine (PE) which is used in Low Density Parity Codec (LDPC) application with a novel charge-recovery logic called pseudo-NMOS boost logic (pNBL), to achieve high-speed and low power dissipation. pNBL is a high-overdriven and low area consuming charge recovery logic, which belongs to boost logic family. Proposed Processing Engine is used in LDPC circuit to reduce operating power dissipation and increase the processing speed. To demonstrate the performance of proposed PE, a test chip is designed and fabricated with 0.18 2m CMOS technology. Simulation results indicate that proposed PE with pNBL dissipates only 1 pJ/cycle when working at the frequency of 403 MHz, which is only 36% of PE with the conventional static CMOS gates. The measurement results show that the test chip can work as high as 609 MHz with the energy dissipation of 2.1 pJ/cycle.