• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.18 no.1 s.116
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• pp.37-43
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• 2007

In this.paper, we introduce design and implementation results of the single balanced diode mixer for European point-to-point microwave radio in order to improve flatness performance. When a resonator such as RF filter is integrated with a mixer, impedance characteristic of 50 ohm is maintained only in RF band, not in LO band resulting deterioration of flatness performance because of LO power variation on the diode. In the paper, we suggest a design method of mixer integrated with image rejection filter and LO harmonic filter to have a better performance of flatness using embedding electrical length between filter and mixer's port. Frequency specification of fabricated mixer is $21.2{\sim}22.6\;GHz$ for RF, $19.32{\sim}20.72\;GHz$ for LO and 1.88 GHz+/-50 MHz for IF, respectively. Measured results show conversion loss of 8.5 dB, flatness of 2 dB, input PldB of 8 dBm, IIP3 of 15 dBm under LO power level of 10 dBm. Return losses of RF, LO and IF port are under -12 dB, -10 dB and -5 dB, respectively. Isolations of LO/RF and LO/IF are 20 dB and 50 dB, respectively.

• Journal of the Korean Society for Nondestructive Testing
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• v.30 no.2
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• pp.155-161
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• 2010

Recently, the electromagnetic techniques of the eddy current testing(ECT), alternating current field testing, magnetic flux leakage testing and remote field testing have been used as a nondestructive evaluation method based on the electromagnetic induction. The eddy current testing is now widely accepted as a NDE method for the heat exchanger tube in the electric power industry, chemical, shipbuilding, and military. The ECT system mainly consists of the synthesizer module, analog module, analog-to-digital converter, power supplier, and data acquisition and analysis program. In this study, the synthesizer module and the analog module which are essential to the ECT system were primarily developed. The developed ECT system is basically a multifrequency type which is able to inject the maximum four frequencies based on the frequency and time domain multiplexing method. Conclusively, we confirmed that the EC signal was processed appropriately in each circuit modules, and the Lissajous EC signal was displayed in the impedance plane.

• Investigative Magnetic Resonance Imaging
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• v.8 no.1
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• pp.42-49
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• 2004

Purpose : The quantization noise in magnetic resonance imaging (MRI) systems is analyzed. The signal-to-quantization noise ratio (SQNR) in the reconstructed image is derived from the level of quantization in the signal in spatial frequency domain. Based on the derived formula, the SQNRs in various main magnetic fields with different receiver systems are evaluated. From the evaluation, the quantization noise could be a major noise source determining overall system signal-to-noise ratio (SNR) in high field MRI system. A few methods to reduce the quantization noise are suggested. Materials and methods : In Fourier imaging methods, spin density distribution is encoded by phase and frequency encoding gradients in such a way that it becomes a distribution in the spatial frequency domain. Thus the quantization noise in the spatial frequency domain is expressed in terms of the SQNR in the reconstructed image. The validity of the derived formula is confirmed by experiments and computer simulation. Results : Using the derived formula, the SQNRs in various main magnetic fields with various receiver systems are evaluated. Since the quantization noise is proportional to the signal amplitude, yet it cannot be reduced by simple signal averaging, it could be a serious problem in high field imaging. In many receiver systems employing analog-to-digital converters (ADC) of 16 bits/sample, the quantization noise could be a major noise source limiting overall system SNR, especially in a high field imaging. Conclusion : The field strength of MRI system keeps going higher for functional imaging and spectroscopy. In high field MRI system, signal amplitude becomes larger with more susceptibility effect and wider spectral separation. Since the quantization noise is proportional to the signal amplitude, if the conversion bits of the ADCs in the receiver system are not large enough, the increase of signal amplitude may not be fully utilized for the SNR enhancement due to the increase of the quantization noise. Evaluation of the SQNR for various systems using the formula shows that the quantization noise could be a major noise source limiting overall system SNR, especially in three dimensional imaging in a high field imaging. Oversampling and off-center sampling would be an alternative solution to reduce the quantization noise without replacement of the receiver system.

• Journal of Advanced Marine Engineering and Technology
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• v.38 no.1
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• pp.48-55
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• 2014

These Xenon flashlamp power supply for Ultra Violet has converter with high voltage conversion ratio. General model is composed of transformer with high voltage conversion ratio and voltage doubler rectifier circuit. Purpose of power supply leads dielectric breakdown of Xenon flashlamp and passes current rapidly. When passing current, it has to limit current to avoid over-heat, damage of electrode and acceleration of gas oxidation which are cause of performance degradation of lamps. Generally, inductors and resistors, which are called as "Ballast," are used to limit currents. Generally, Transformer has high turn ratio to make high voltages. But we can get high voltages using the transformer with low turn ratio which is driven with self resonance. Also, an advantage of self resonance is to make a circuit simply through impedance of transformer in resonance frequency which filters output voltage. As using an unique impedance of transformer, the circuit does not need other impedance elements like the ballast. So the power supply assures high efficiency of the arc discharge.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.12 s.354
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• pp.55-64
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• 2006

This work proposes a calibration-free 14b 70MS/s 0.13um CMOS ADC for high-performance integrated systems such as WLAN and high-definition video systems simultaneously requiring high resolution, low power, and small size at high speed. The proposed ADC employs signal insensitive 3-D fully symmetric layout techniques in two MDACs for high matching accuracy without any calibration. A three-stage pipeline architecture minimizes power consumption and chip area at the target resolution and sampling rate. The input SHA with a controlled trans-conductance ratio of two amplifier stages simultaneously achieves high gain and high phase margin with gate-bootstrapped sampling switches for 14b input accuracy at the Nyquist frequency. A back-end sub-ranging flash ADC with open-loop offset cancellation and interpolation achieves 6b accuracy at 70MS/s. Low-noise current and voltage references are employed on chip with optional off-chip reference voltages. The prototype ADC implemented in a 0.13um CMOS is based on a 0.35um minimum channel length for 2.5V applications. The measured DNL and INL are within 0.65LSB and l.80LSB, respectively. The prototype ADC shows maximum SNDR and SFDR of 66dB and 81dB and a power consumption of 235mW at 70MS/s. The active die area is $3.3mm^2$.

• Journal of the Korean Society for Nondestructive Testing
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• v.31 no.5
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• pp.552-559
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• 2011

Recently, the eddy current testing(ECT), alternating current field testing, magnetic flux leakage testing and remote field testing have been used as a nondestructive evaluation method based on the electromagnetic induction phenomenon. The eddy current testing is now widely accepted as a NDE method for the heat exchanger tube in the electric power industry, chemical, shipbuilding, and military. The ECT system mainly consists of the synthesizer module, analog module, analog-to-digital converter, power supplier, and data acquisition and analysis program. In the previous study, the synthesizer module and the analog module which is essential to the ECT system were primarily developed, and in this study the data acquisition and analysis program were developed. The operation system for this program is based on the Windows 7, and optimized for the Korean users, and the specific feature of this program using setup wizard enables inspector to make a setup easily for acquisition and analysis of ECT data. In this paper, the configuration and functions of eddy current data acquisition and analysis program will be introduced.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.11
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• pp.21-30
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• 1998

In this paper, a digital current control system using a FPGA(Field Programmable Gate Array) was implemented, and the system was applied to an induction motor widely used as an industrial driving machine. The FPGA designed by VHDL(VHSIC Hardware Description Language) consists of a PWM(Pulse Width Modulation) generation block, a PWM protection block, a speed measuring block, a watch dog timer block, an interrupt control block, a decoder logic block, a wait control block and digital input and output blocks respectively. Dedicated clock inputs on the FPGA were used for high-speed execution, and an up-down counter and a latch block were designed in parallel, in order that the triangle wave could be operated at 40 MHz clock. When triangle wave is compared with many registers respectively, gate delay occurs from excessive fan-outs. To reduce the delay, two triangle wave registers were implemented in parallel. Amplitude and frequency of the triangle wave, and dead time of PWM could be changed by software. This FPGA was synthesized by pASIC 2SpDE and Synplify-Lite synthesis tool of Quick Logic company. The final simulation for worst cases was successfully performed under a Verilog HDL simulation environment. And the FPGA programmed for an 84 pin PLCC package was applied to digital current control system for 3-phase induction motor. The digital current control system of the 3 phase induction motor was configured using the DSP(TMS320C31-40 MHz), FPGA, A/D converter and Hall CT etc., and experimental results showed the effectiveness of the digital current control system.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.9
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• pp.68-73
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• 2013

In this paper, we proposed a readout circuit of pulse waveform and rate for a U-health system to monitor health condition. For long-time operation without replacing or charging a battery, either pulse waveform or pulse rate is selected as the output data of the proposed readout circuit according to health condition of a user. The proposed readout circuit consists of a simple digital logic discriminator and a dual-mode ADC which operates in the ADC mode or in the count mode. Firstly, the readout circuit counts pulse rate for 4 seconds in the count mode using the dual-mode ADC. Health condition is examined after the counted pulse rate is accumulated for 1 minute in the discriminator. If the pulse rate is out of the preset normal range, the dual-mode ADC operates in the ADC mode where pulse waveform is converted into 10-bit digital data with the sampling frequency of 1 kHz. These data are stored in a buffer and transmitted by 620 kbps to an external monitor through a RF transmitter. The data transmission period of the RF transmitter depends on the operation mode. It is generally 1 minute in the normal situation or 1 ms in the emergency situation. The proposed readout circuit was designed with $0.11{\mu}m$ process technology. The chip area is $460{\times}800{\mu}m^2$. According to measurement, the power consumption is $161.8{\mu}W$ in the count mode and $507.3{\mu}W$ in the ADC mode with the operating voltage of 1 V.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.4
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• pp.481-488
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• 2011

In this paper, we study a novel wireless interference cancellation system(ICS) repeater based on OFDM system with phase noise analysis and performance evaluation. Recently, there were many researches about wireless repeater. The previous study is just considering the feedback channel cancellation algorithm. But, in wireless repeater system, the phase noise effect can exist at up and down converter of wireless repeater. In wireless repeater system, if there are phase noise effects, the performance of system will get worse. So, the phase noise compensator is needed in wireless repeater. Therefore, we propose adaptive phase noise compensator based on OFDM system in order to effectively cancel phase noise. In order to cancel interference, we adapt adaptive phase noise compensator in wireless repeater system. The adaptive phase noise compensator compensates phase noise effect. Therefore, in this paper, we analyze phase noise of wireless repeater based on OFDM system. In this paper, when phase noise power is -15 dBc and phase noise cutoff frequency is 100 kHz at 4QAM, the BER performance of propose algorithm is better about 4 dB than with adaptive equalizer and without phase noise compensator at $10^{-4}$.

• Korean Journal of Optics and Photonics
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• v.31 no.3
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• pp.142-147
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• 2020

In this paper, we report highly efficient second harmonic generation of continuous-wave Yb fiber lasers incorporating a periodically poled LiTaO₃ device (MgO:PPSLT) as a frequency converter. The seed laser output from a Yb fiber master oscillator using a Fabry-Perot feedback cavity was amplified in a Yb fiber amplifier stage, yielding 28.5 W of linearly polarized output at 1064 nm in a beam with beam quality, M², of ~1.07. Second harmonic generation was achieved by passing the laser beam through MgO:PPSLT. Under optimized conditions, we obtained 11.1 W of green laser output at 532 nm for an incident signal power of 25.0 W at 1064 nm, corresponding to a conversion efficiency of 44.4%. The detailed investigation to find the optimized operating conditions and prospects for further improvement are discussed.