• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.12
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• pp.67-74
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• 2004

AES is frequently used as a symmetric cryptography algorithm for the Internet. Wireless embedded systems increasingly use more conventional wired network protocols. Hence, it is important to have low-cost implementations of AES for thor The basic architecture of AES unrolls oかy one full cipher round which uses 20 S-boxes together with the key scheduler and the algorithm repeatedly executes it. To reduce the implementation cost further, the folded architecture which uses only eight S-box units was studied in the recent years. In this paper, we will study a low-cost AES implementation for wireless communication technology based on the folded architecture. We first improve the folded architecture to avoid the sixteen bytes of additional state memory. Then, we implemented a single byte architecture where only one S-box unit is used for data encryption and key scheduling. It takes 352 clocks to finish a complete encryption. We found that the maximum clock frequency of its FPGA implementation reaches about 40 MHz. It can achieve about 13 Mbps which is enough for 3G wireless communication technology.

• JSTS:Journal of Semiconductor Technology and Science
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• v.10 no.3
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• pp.193-202
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• 2010

This paper presents a high-speed low-complexity pipelined Reed-Solomon (RS) (255,239) decoder using pipelined reformulated inversionless Berlekamp-Massey (pRiBM) algorithm and its folded version (PF-RiBM). Also, this paper offers efficient pipelining and folding technique of the RS decoders. This architecture uses pipelined Galois-Field (GF) multipliers in the syndrome computation block, key equation solver (KES) block, Forney block, Chien search block and error correction block to enhance the clock frequency. A high-speed pipelined RS decoder based on the pRiBM algorithm and its folded version have been designed and implemented with 90-nm CMOS technology in a supply voltage of 1.1 V. The proposed RS(255,239) decoder operates at a clock frequency of 700 MHz using the pRiBM architecture and also operates at a clock frequency of 750 MHz using the PF-RiBM, respectively. The proposed architectures feature high clock frequency and low-complexity.

• Journal of Korea Multimedia Society
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• v.15 no.1
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• pp.81-86
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• 2012

This paper presents a VLSI design for lifting-based discrete wavelet transform (DWT) 9/7 filter using multiplierless multiple constant multiplication (MCM) architecture. This proposed design is based on the lifting scheme using pattern search for folded architecture. Shift-add operation is adopted to optimize the multiplication process. The conventional serial operations of the lifting data flow can be optimized into parallel ones by employing paralleling and pipelining techniques. This optimized design has simple hardware architecture and requires less computation without performance degradation. Furthermore, hardware utilization reaches 100%, and the number of registers required is significantly reduced. To compare our work with previous methods, we implemented the architecture using Verilog HDL. We also executed simulation based on the logic synthesis using $0.18{\mu}m$ CMOS standard cells. The proposed architecture shows hardware reduction of up to 60.1% and 44.1% respectively at 200 MHz clock compared to previous works. This implementation results indicate that the proposed design performs efficiently in hardware cost, area, and power consumption.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.6
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• pp.760-767
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• 2014

This paper describes a high-radix crossbar switch design with low latency and power dissipation for Network-on-Chip (NoC) applications. The reduction in latency and power is achieved by employing a folded-clos topology, implementing the switch organized as three stages of low-radix switches connected in cascade. In addition, to facilitate the uniform placement of wires among the sub-switch stages, this paper proposes a Mux-Matrix-Mux structure, which implements the first and third switch stages as multiplexer-based crossbars and the second stage as a matrix-type crossbar. The proposed 256-radix, 8-bit crossbar switch designed in a 65nm CMOS has the simulated power dissipation of 1.92-W and worst-case propagation delay of 0.991-ns while operating at 1.2-V supply and 500-MHz frequency. Compared with the state-of-the-art designs in literature, the proposed crossbar switch achieves the best energy-delay-area efficiency of $0.73-fJ/cycle{\cdot}ns{\cdot}{\lambda}^2$.

• ETRI Journal
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• v.35 no.4
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• pp.697-705
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• 2013

Emerging trends in the area of digital very large scale integration (VLSI) signal processing can lead to a reduction in the cost of the cochlear implant. Digital signal processing algorithms are repetitively used in speech processors for filtering and encoding operations. The critical paths in these algorithms limit the performance of the speech processors. These algorithms must be transformed to accommodate processors designed to be high speed and have less area and low power. This can be realized by basing the design of the auditory filter banks for the processors on digital VLSI signal processing concepts. By applying a folding algorithm to the second-order digital gammatone filter (GTF), the number of multipliers is reduced from five to one and the number of adders is reduced from three to one, without changing the characteristics of the filter. Folded second-order filter sections are cascaded with three similar structures to realize the eighth-order digital GTF whose response is a close match to the human cochlea response. The silicon area is reduced from twenty to four multipliers and from twelve to four adders by using the folding architecture.

• Proceedings of the Korean Institute of Interior Design Conference
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• 2006.11a
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• pp.219-222
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• 2006

Architecture is builded on the ground and affected environment which include shape of topography and situation. What this study saying is the analysis about the relation between the concept of structural geomorphology and the space modern architecture. As there are many issue about boundary of space and organic architecture, It is important what study about structural geomorphology In paper, we will aware that there are many similarities between architecture and topography. Notion of folded structure in structural geomorphology is connected with continuity or infinity. This is one of many example.

• Journal of Korean Society of Steel Construction
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• v.26 no.6
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• pp.571-579
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• 2014

The steel braces are used to control the lateral drift of high rise buildings. The braces are designed as tensile members since the braces consisted of slender member can not resist compressive loads by elastic buckling. To resolve this problem, a lot of research were performed to develop the non-buckling member. The force limiting device (FLD.) is one of them. The purpose of this study is the development of FLD. to prevent a elastic buckling for a slender member. The folded plate type is proposed to induce the yielding before occurring elastic buckling. In this study, member test and FEM analysis for proposed type were performed. Further, It is verified that the structure with FLD member is stable by high energy absorption. The proposed folded plate type FLD could be effective to preserve the compressive member from the elastic buckling.

• Architectural research
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• v.19 no.1
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• pp.13-19
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• 2017

In banquets of royal courts held in the late Joseon Dynasty, a procedure that follows the customs as well as physical components to follow that procedure were necessary. A noticeable trait of the red blinds(朱簾) is that they are seen in the naeyon(內宴) types of banquets, which is mostly centered on the queen dowager and relatives, and they function as a makeshift facility that divide the different banquet spaces according to the hierarchy of the royal family. Furthermore, the red blinds within the court played an important role in the procedure of the banquet along with the incense, as it was drawn upon the queen dowager's appearance to signal the beginning, and folded out again to signal the end. This indicates that they were of higher importance within the banquet space. The red blinds used in the playacting stage of the royal court not only segmented the space, but also upon being taken down, expanded and integrated the banquet hall, thereby maximizing the playacting stage. Once the banquet was finished, the red blinds within the court were once again folded out so as to restore dignity to the space. The red blind is a symbolic item that could open the private space of the court so as to enable communication with the public space, and also close it off to restore privacy. Also, the layout of the banquet space was divided by the red blinds into primary, secondary, and tertiary hierarchal space, according to the status of the royal family and the banquet attendants. In other words, the red blinds played an important role in its the symbolic meaning in the national precedent as well as distinguishing the hierarchy of space within the naeyon banquet in the royal court.

• Journal of IKEEE
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• v.19 no.1
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• pp.45-51
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• 2015

Recently, as WPAN (Wireless Personal Area Network) becomes the necessary feature in IoT (Internet of Things) devices, the importance of data security also hugely increases. In this paper, we present the low-complexity 128-bit AES-$CCM^*$ hardware IP for IEEE 802.15.4 standard. For low-cost and low-power implementation which is essentially required in IoT devices, we propose two optimization methods. First, the folded AES(Advanced Encryption Standard) processing core with 8-bit datapath is presented where composite field arithmetic is adopted for reduced hardware complexity. In addition, to support $CCM^*$ mode defined in IEEE 802.15.4, we propose the mode-toggling architecture which requires less hardware resources and processing time. With the proposed methods, the gate count of the proposed AES-$CCM^*$ IP can be lowered up to 57% compared to the conventional architecture.

• Journal of architectural history
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• v.14 no.2 s.42
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• pp.71-88
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• 2005

This study aims at clarifying the spatial generative process of Borromini's architecture. The close examination of his sketches and the analysis of his major four works such as San Carlo alle Quattro Fontane (1634-1667), Sant'Ivo della Sapienza (1642-1660), Santa Maria dei Sette Dolori, Chapel (1643-1646), Collegio di Propaganda Fide, Chapel (1652-1667) show common features in the generation of space as follow. 1) The spatial generative process of Borromini's architecture is dominated by the plan of main space which is formulated from simple geometric elements into complexly folded space by mean of union, addition, copy and warping. 2) Borromini made various kinds of annexed space around the main space to create long and continuous circulation. 3) Borromini's architecture has a tendency to divide interior elevation into two parts, wall part and roof part by thick entablature. Moreover the entablature play important role to copy the figure of the plan of main space three-dimensionally. 4) Borromini tried to create the sense of depth through perspectival distortion and multi-focal space through the ceiling pattern.