• Title/Summary/Keyword: Flip Chip

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Elastoplastic Behavior and Creep Analysis of Solder in a FC-PBGA Package (플립 칩 패키지 솔더의 탄소성 거동과 크립 해석)

  • Choi, Nam-Jin;Lee, Bong-Hee;Joo, Jin-Won
    • Journal of the Microelectronics and Packaging Society
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    • v.17 no.2
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    • pp.21-28
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    • 2010
  • Creep behaviors of the solder balls in a flip chip package assembly during thermal cycling test is investigated.. A material models used in the finite element analysis are viscoplastic model introduced by Anand and creep model called partitioned model. Experiment of two temperature cycles using moir$\acute{e}$ interferometry is conducted to verify the reliability of material models for the analysis of thermo-mechanical behavior. Bending deformations of the assemblies and average strains of the solder balls due to temperature change and dwell time are investigated. The results show that time-dependent shear strain of solder by the partitioned model is in excellent agreement with those by moir$\acute{e}$ interferometry, while there is considerable difference between results by Anand model and experiment. In this paper, the partitioned model is employed for the time-dependent creep analysis of the FC-PBGA package. It is also shown that the thermo-mechanical stress becomes relaxed by creep behavior at high temperature during temperature cycles.

Interfacial Reactions of Sn-Ag-Cu solder on Ni-xCu alloy UBMs (Ni-xCu 합금 UBM과 Sn-Ag계 솔더 간의 계면 반응 연구)

  • Han Hun;Yu Jin;Lee Taek Yeong
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 2003.11a
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    • pp.84-87
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    • 2003
  • Since Pb-free solder alloys have been used extensively in microelectronic packaging industry, the interaction between UBM (Under Bump Metallurgy) and solder is a critical issue because IMC (Intermetallic Compound) at the interface is critical for the adhesion of mechanical and the electrical contact for flip chip bonding. IMC growth must be fast during the reflow process to form stable IMC. Too fast IMC growth, however, is undesirable because it causes the dewetting of UBM and the unstable mechanical stability of thick IMC. UP to now. Ni and Cu are the most popular UBMs because electroplating is lower cost process than thin film deposition in vacuum for Al/Ni(V)/Cu or phased Cr-Cu. The consumption rate and the growth rate of IMC on Ni are lower than those of Cu. In contrast, the wetting of solder bumps on Cu is better than Ni. In addition, the residual stress of Cu is lower than that of Ni. Therefore, the alloy of Cu and Ni could be used as optimum UBM with both advantages of Ni and Cu. In this paper, the interfacial reactions of Sn-3.5Ag-0.7Cu solder on Ni-xCu alloy UBMs were investigated. The UBMs of Ni-Cu alloy were made on Si wafer. Thin Cr film and Cu film were used as adhesion layer and electroplating seed layer, respectively. And then, the solderable layer, Ni-Cu alloy, was deposited on the seed layer by electroplating. The UBM consumption rate and intermetallic growth on Ni-Cu alloy were studied as a function of time and Cu contents. And the IMCs between solder and UBM were analyzed with SEM, EDS, and TEM.

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Interfacial Reactions of Sn Solder with Variations of Under-Bump-Metallurgy and Reflow Time (Under Bump Metallurgy의 종류와 리플로우 시간에 따른 Sn 솔더 계면반응)

  • Park, Sun-Hee;Oh, Tae-Sung;Englemann, G.
    • Journal of the Microelectronics and Packaging Society
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    • v.14 no.3
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    • pp.43-49
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    • 2007
  • Thickness of intermetallic compounds and consumption rates of under bump metallurgies (UBMs) were investigated in wafer-level solder bumping with variations of UBM materials and reflow times. In the case of Cu UBM, $0.6\;{\mu}m-thick$ intermetallic compound layer was formed before reflow of Sn solder, and the average thickness of the intermetallic compound layer increased to $4\;{\mu}m$ by reflowing at $250^{\circ}C$ for 450 sec. On the contrary, the intermetallic layer had a thickness of $0.2\;{\mu}m$ on Ni UBM before reflow and it grew to $1.7\;{\mu}m$ thickness with reflowing for 450 sec. While the consumption rates of Cu UBM were 100nm/sec fur 15-sec reflow and 4.50-sec for 450-sec reflow, those of Ni UBM decreased to 28.7 nm/sec for 15-sec reflow and 1.82 nm/sec for 450-sec reflow.

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Formation of high uniformity solder bump for wafer level package by tilted electrode ring (경사진 전극링에 의한 웨이퍼레벨패키지용 고균일도의 솔더범프 형성)

  • Ju, Chul-Won;Lee, Kyung-Ho;Min, Byoung-Gue;Kim, Seong-Il;Lee, Jong-Min;Kang, Young-Il;Han, Byung-Sung
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.07a
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    • pp.366-369
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    • 2003
  • The vertical fountain plating system with the point contact has been used in semiconductor industry. But the plating shape in the opening of photoresist becomes gradated shape, because bubbles from the wafer surface are difficult to escape from the deep openings, vias. So, we designed the tilted electrode ring contact to get uniform bump height on all over the wafer and evaluated the film uniformity by SEM and $\alpha$-step. A photoresist was coated to a thickness of $60{\mu}m$ and vias were patterned by a contact aligner After via opening, solder layer was electroplated using the fountain plating system and the tilted electrode ring contact system. In $\alpha$-step measurement, film uniformities in the fountain plating system and the tilted electrode ring contact system were ${\pm}16%,\;{\pm}3.7%$ respectively. In this study, we could get high uniformity bumps by the tilted electrode ring contact system. So, tilted electrode ring contact system is expected to improve workability and yield in module process.

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A 900 MHz RFID Receiver with an Integrated Digital Data Slicer (디지털 데이터 슬라이서가 집적된 900 MHz 대역의 RFID 수신단)

  • Cho, Younga;Kim, Dong-Hyun;Kim, Namhyung;Rieh, Jae-Sung
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.26 no.1
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    • pp.63-70
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    • 2015
  • In this paper, a receiver has been developed in a $0.11-{\mu}m$ CMOS technology for 900 MHz RFID communication system applications. The receiver is composed of an envelope detector, a low-pass-filter, a comparator, D flip-flops, as well as an oscillator to provide the clock for digital blocks. The receiver is designed for low power consumption, which would be suitable for passive RFID tags. In this circuit, a digital data slicer was employed instead of the conventional analog data slicer in order to reduce the power consumption. The clock frequency is 1.68 MHz and the circuit operates with a power consumption as small as $5{\mu}W$. The chip size is $325{\mu}m{\times}290{\mu}m$ excluding the probing pads.

Elastic Properties and Repeated Deformation Reliabilities of Stiffness-Gradient Stretchable Electronic Packages (강성도 경사형 신축 전자패키지의 탄성특성 및 반복변형 신뢰성)

  • Han, Kee Sun;Oh, Tae Sung
    • Journal of the Microelectronics and Packaging Society
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    • v.26 no.4
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    • pp.55-62
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    • 2019
  • Stiffness-gradient stretchable electronic packages of the soft PDMS/hard PDMS/FPCB structure were processed using the polydimethylsiloxane (PDMS) as the base substrate and the more stiff flexible printed circuit board (FPCB) as the island substrate. The elastic characteristics of the stretchable packages were estimated and their long-term reliabilities on stretching cycles and bending cycles were characterized. With 0.28 MPa, 1.74 MPa, and 1.85 GPa as the elastic moduli of the soft PDMS, hard PDMS, and FPCB, respectively, the effective elastic modulus of the soft PDMS/hard PDMS/FPCB package was estimated as 0.6 MPa. The resistance of the stretchable packages varied for 2.8~4.3% with stretching cycles ranging at 0~0.3 strain up to 15,000 cycles and for 0.9~1.5% with 15,000 bending cycles at a bending radius of 25 mm.

Comparison of PCB Surface Treatment Effect Using UV Equipment and Atmospheric Pressure Plasma Equipment (UV 장비 및 대기압 플라즈마 장비를 이용한 PCB 표면 처리 효과 비교)

  • Ryu, Sun-Joong
    • Journal of the Microelectronics and Packaging Society
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    • v.16 no.3
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    • pp.53-59
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    • 2009
  • Low pressure mercury lamp type UV equipments have been widely used for cleaning and modification of PCB surfaces. To enhance the productivity of the process, we newly developed remote DBD type atmospheric pressure plasma equipment. The productivity of both equipments could be compared by measuring surface contact angle for various transferring speed. By the result of the measurement, we could verify that the productivity of the atmospheric pressure plasma be superior to the productivity of the UV equipment. XPS experiments confirmed that the surface effect of the UV and atmospheric pressure plasma processing are similar for each other. Organic contamination level was reduced after the processing and some surface elements were oxidized for both cases. Finally, the atmospheric pressure plasma equipment was adapted to flip chip BGA's flux printing process and it was concluded that the printing uniformity be enhanced by the atmospheric pressure plasma surface treatment.

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Thermal properties and mechanical properties of dielectric materials for thermal imprint lithography

  • Kwak, Jeon-Bok;Cho, Jae-Choon;Ra, Seung-Hyun
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2006.06a
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    • pp.242-242
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    • 2006
  • Increasingly complex tasks are performed by computers or cellular phone, requiring more and more memory capacity as well as faster and faster processing speeds. This leads to a constant need to develop more highly integrated circuit systems. Therefore, there have been numerous studies by many engineers investigating circuit patterning. In particular, PCB including module/package substrates such as FCB (Flip Chip Board) has been developed toward being low profile, low power and multi-functionalized due to the demands on miniaturization, increasing functional density of the boards and higher performances of the electric devices. Imprint lithography have received significant attention due to an alternative technology for photolithography on such devices. The imprint technique. is one of promising candidates, especially due to the fact that the expected resolution limits are far beyond the requirements of the PCB industry in the near future. For applying imprint lithography to FCB, it is very important to control thermal properties and mechanical properties of dielectric materials. These properties are very dependent on epoxy resin, curing agent, accelerator, filler and curing degree(%) of dielectric materials. In this work, the epoxy composites filled with silica fillers and cured with various accelerators having various curing degree(%) were prepared. The characterization of the thermal and mechanical properties wasperformed by thermal mechanical analysis (TMA), thermogravimetric analysis (TGA), differential scanning calorimetry (DSC), rheometer, an universal test machine (UTM).

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A Study of Warpage Analysis According to Influence Factors in FOWLP Structure (FOWLP 구조의 영향 인자에 따른 휨 현상 해석 연구)

  • Jung, Cheong-Ha;Seo, Won;Kim, Gu-Sung
    • Journal of the Semiconductor & Display Technology
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    • v.17 no.4
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    • pp.42-45
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    • 2018
  • As The semiconductor decrease from 10 nanometer to 7 nanometer, It is suggested that "More than Moore" is needed to follow Moore's Law, which has been a guide for the semiconductor industry. Fan-Out Wafer Level Package(FOWLP) is considered as the key to "More than Moore" to lead the next generation in semiconductors, and the reasons are as follows. the fan-out WLP does not require a substrate, unlike conventional wire bonding and flip-chip bonding packages. As a result, the thickness of the package reduces, and the interconnection becomes shorter. It is easy to increase the number of I / Os and apply it to the multi-layered 3D package. However, FOWLP has many issues that need to be resolved in order for mass production to become feasible. One of the most critical problem is the warpage problem in a process. Due to the nature of the FOWLP structure, the RDL is wired to multiple layers. The warpage problem arises when a new RDL layer is created. It occurs because the solder ball reflow process is exposed to high temperatures for long periods of time, which may cause cracks inside the package. For this reason, we have studied warpage in the FOWLP structure using commercial simulation software through the implementation of the reflow process. Simulation was performed to reproduce the experiment of products of molding compound company. Young's modulus and poisson's ratio were found to be influenced by the order of influence of the factors affecting the distortion. We confirmed that the lower young's modulus and poisson's ratio, the lower warpage.

Failure in the COG Joint Using Non-Conductive Adhesive and Polymer Bumps (감광성 고분자 범프와 NCA (Non-Conductive Adhesive)를 이용한 COG 접합에서의 불량)

  • Ahn, Kyeong-Soo;Kim, Young-Ho
    • Journal of the Microelectronics and Packaging Society
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    • v.14 no.1
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    • pp.33-38
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    • 2007
  • We studied a bonding at low temperature using polymer bump and Non-Conductive Adhesive (NCA), and studied the reliability of the polymer bump/Al pad joints. The polymer bumps were formed on oxidized Si substrates by photolithography process, and the thin film metals were formed on the polymer bumps using DC magnetron sputtering. The substrate used was AL metallized glass. The polymer bump and Al metallized glass substrates were joined together at $80^{\circ}C$ under various pressure. Two NCAs were applied during joining. Thermal cycling test ($0^{\circ}C-55^{\circ}C$, cycle/30 min) was carried out up to 2000 cycles to evaluate the reliability of the joints. The bondability was evaluated by measuring the contact resistance of the joints through the four point probe method, and the joints were observed by Scanning Electron Microscope (SEM). The contact resistance of the joints was $70-90m{\Omega}$ before the reliability test. The joints of the polymer bump/Al pad were damaged by NCA filler particles under pressure above 200 MPa. After reliability test, some joints were electrically failed since thinner metal layers deposited at the edge of bumps were disconnected.

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