• The Journal of the Acoustical Society of Korea
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• v.21 no.7
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• pp.648-655
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• 2002

This paper describes implementation of a multi-channel G.723.1 Annex A (G.723.1A) focused on code optimization using a high performance general purpose Digital Signal Processor (DSP), To implement a multi-channel G.723.1A functional complexities of the ITU-T G.723.1A fixed-point C-code are measures an analyzed. Then we sort and optimize C functions in complexity order. In parallel with optimization, we verify the bit-exactness of the optimized code using the ITU-T test vectors. Using only internal memory, the optimized code can perform full-duplex 17 channel processing. In addition, we further increase the number of available channels per DSP into 22 using fast codebook search algorithms, referred to as bit -compatible optimization.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.11B
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• pp.1957-1965
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• 2000

본 논문에서는 휴대 멀티미디어 응용을 위한 MDSP(Multimedia Fixed Point DSP) 칩의 내장 메모리 테스트와 기판 수준의 테스트를 지원하기 위해 내장 메모리 테스트를 위한 자체 테스트 기법, 기판 수준의 테스트 지원 및 내장 메모리를 위한 자체 테스트 회로를 제어하기 위한 경계 주사 기법을 구현하였다. 본 논문에서 구현한 기법들은 Verilog HDL을 이용하여 회로들을 설계하였으며, Synopsys 툴과 현대 heb60 라이브러리를 이용하여 합성하였다. 그리고 회로 검증을 위한 시뮬레이터는 Cadence사의 VerilogXL을 사용하였다.

• 제어로봇시스템학회:학술대회논문집
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• 1996.10b
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• pp.286-289
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• 1996

Two servo control algorithms are suggested to reduce the tracking error of a computer hard disk drive. One is the repetitive control to reduce the repeatable tracking error which is not explicitly taken into account in the design of a conventional controller. This algorithm was successfully applied to a commercial disk using a fixed point DSP. The other is the multi-rate sampling control which generates the control output between each sampling times since the sampling time of hard disk drives is limited. These algorithms were shown effectively to reduce tracking errors.

• Journal of the Korean Society for Precision Engineering
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• v.13 no.5
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• pp.131-138
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• 1996

This paper suggests a servo control algorithm to reduce the repeatable tracking error which is not explicitly taken into account in the design of a conventional PID controller of a computer hard disk drive. The robust stability of the repetitive control system with multiplicative modelling error is analyzed, and the controller was implemented using a fixed point DSP(Digital Signal Processor). Experimental results show that the repetitive errors are suppressed effectively by the proposed controller.

• Proceedings of the IEEK Conference
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• 2000.06d
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• pp.92-97
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• 2000

An AMR(Adaptive Multi-Rate) speech coding algorithm has been adopted as a standard speech codec for IMT-2000. It is based on the algebraic CELP, and consists of eight speech coding modes having the bit rate from 4.75 kbit/s to 12.2 kbit/s. It also contains the VAD(Voice Activity Detector), SCR (Source Controlled Rate) operation, and error concealment scheme for robustness in a radio channel. The bit rate of AMR is changed on a frame basis depending on the channel condition. In this paper, we introduced AMR speech coding algorithm and performed the real-time implementation using TMS320C6201, i.e., a Texas Instrument's fixed-point DSP. With the ANSI C source code released from ETSI and 3GPP, we convert and optimize the program to make it run in real time using the C compiler and assembly language. It is verified that the decoded result of the implemented speech codec on the DSP is identical with the PC simulation result using ANSI C code for test sequences. Also, actual sound input/output test using microphone and speaker demonstrates its proper real-time operation without distortions or delays.

• Proceedings of the Acoustical Society of Korea Conference
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• spring
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• pp.145-148
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• 2000

본 논문은 범용 16bit Fixed-point DSP를 이용한 새로운 미국 DoD 2.4kbps MELP(Mixed Excitation Linear Predictive)보코더의 실시간 구현에 관한 것이다. 구현된 MELP보코더는 ROM 32.6kword, RAM 12.2kword를 가지며 40MIPS DSP에서 약 29MIPS를 필요로 하였다. 출력된 파형은 C simulator 와 Bit Exact한 출력 결과를 보여주었다. 실시간 구현된 MELP를 동일전송율의 2.4kbps AMBE와 음질 비교한 결과 AME보다는 MOS 0.2 음질 이 떨어졌다

• Proceedings of the Acoustical Society of Korea Conference
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• autumn
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• pp.283-286
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• 2004

Due to advances in electronics very high quality audio reproduction is today possible. But the listening environment causes deviation of the audio system from the expected behavior. Firstly the listening Room significantly changes the audio signal frequencies and their phase. Secondly the position of the user in the room affects the perceived sound. With existing DSP technology it is possible to adequately correct these effects. In our work we developed a room correction system, correcting up to 7.1 channels using dual Motorola 56367 fixed point DSP's, implementing position dependent room effects measurement, real time compensation filter design and equalization filtering procedures.

• Proceedings of the KIEE Conference
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• 2001.11c
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• pp.365-368
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• 2001

This work describes a real-time method, based on motion energy detection, for detecting and tracking moving object in the consecutive image sequences. The motion of moving objects is detected by taking the difference of the two consecutive image frames. In addition an edge information of the current image is utilized in order to further increase the accuracy of detection. We can track the moving objects continuously by detecting the motion of objects from the sequence of image frames. A prototype system has been implemented using a TI TMS320C6201 EVM fixed-point DSP board, which can successfully track a moving human in real-time.

• Proceedings of the KIEE Conference
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• 2002.11c
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• pp.461-464
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• 2002

OFDM is a promising technology for high speed multimedia communication. In this paper, Software IPs for IEEE 802.11a OFDM system are designed and optimized for TI's TMS320C6201 fixed-point DSP. Then considering the execution cycles of the target DSP for each functions of the system, an efficient HW/SW partitioning method is proposed and according to this results, high speed Viterbi decoder hardware IP for 802.11a system is designed and verified.

• Proceedings of the IEEK Conference
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• 2001.06d
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• pp.119-122
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• 2001

본 논문에서는 음성압축 앨고리즘인 MPEG-4 CELP coder를 16 bit DSP 구현에 필요한 고정소수점 연산구조로 구현하였다. 기본 앨고리즘 중에 LSP 계수를 구하는 방법인 Chebyshev series method 대신 고정소수점 구현에 유리한 Real root method 앨고리즘을 사용하였다. 또한 cosine, log 둥 DSP 명령어가 지원하지 않는 수학 함수들은 미리 계산하여 테이블 적용기법을 사용하였고 고정 소수점 연산에 불리한 나눗셈 연산을 최대한 배제하였다. 고정 소수점 연산 구조로 변환한 후 부동 소수점 연산구조와의 비교를 통하여 오차를 최소화하도록 하였다 구현한 음성코더를 남, 여 각 5문장에 적용했을 때 부동 소수점 연산구조에 비교해 음질의 열화가 없음을 확인하였다.