• Title/Summary/Keyword: Finite state machine

Search Result 230, Processing Time 0.021 seconds

Design and Implementation of a Single-Chip 8-Bit Microcontroller (단일 칩 8비트 마이크로컨트롤러의 설계 및 구현)

  • Ahn, Jung-Il;Park, Sung-Hwan;Kwon, Sung-Jae
    • Journal of Korea Society of Industrial Information Systems
    • /
    • v.11 no.4
    • /
    • pp.72-81
    • /
    • 2006
  • In this paper, we first define a total of 64 instructions that are considered to be essential and frequently used, construct a datapath diagram, determine the control sequence using a finite state machine, and implement an 8-bit microcontroller using FPGA in VHDL. In the past, only functional simulation results of a rudimentary microcontroller were reported, the microcontroller lacked interrupt handling capability, or it was not implemented in hardware. We have designed a self-contained 8-bit microcontroller such that it can perform data transfer, addition, and logical operations, as well as stack and external interrupt operations. Following timing simulation of the designed microcontroller, we implemented it in an FPGA and verified its operation successfully. The design and implementation has been done under the Altera MAX+PLUS II integrated development environment using the EP1K50TC144-3 chip. The maximum operating frequency, the total number of logic elements used, and the logic utilization were found to be 9.39 MHz, 2813, and 97%, respectively. The result can be used as a microcontroller IP, and as needs arise, the VHDL code can be modified accordingly.

  • PDF

LOTOS Protocol Conformance Testing for Formal Description Specifications (형식 기술 기법에 의한 LOTOS 프로토콜 적합성 시험)

  • Chin, Byoung-Moon;Kim, Sung-Un;Ryu, Young-Suk
    • The Transactions of the Korea Information Processing Society
    • /
    • v.4 no.7
    • /
    • pp.1821-1841
    • /
    • 1997
  • This paper presents an automated protocol conformance test sequence generation based on formal methods for LOTOS specification by using and applying many existing related algorithms and technique, such as the testing framework, Rural Chinese Postman tour concepts. We use the state-transition graphs obtained from LOTOS specifications by means of the CAESAR tool. This tool compiles a specification written in LOTOS into an extended Petri net, from which a transition graph of a event finite-state machine(EvFSM) including data is generated. A new characterizing sequence(CS), called Unique Event sequence(UE sequence) is defined. An UE sequence for a state is a sequence of accepted gate events that is unique for this state. Some experiences about UE sequence, partial UE sequence and signature are also explained. These sequences are combined with the concept of the Rural Chinese Postman Tour to obtain an optimal test sequence which is a minimum cost tour of the reference transition graph of the EvFSM. This paper also presents a fault coverage estimation experience of an automated method for optimized test sequences generation and the translation of the test sequence obtained by using our tool to TTCN notation are also given. A prototype of the proposed framework has been built with special attention to real application in order to generated the executable test cases in an automatic way. This formal method on conformance testing can be applied to the protocols related to IN, PCS and ATM for the purpose of verifying the correctness of implementation with respect to the given specification.

  • PDF

Research on Hyperparameter of RNN for Seismic Response Prediction of a Structure With Vibration Control System (진동 제어 장치를 포함한 구조물의 지진 응답 예측을 위한 순환신경망의 하이퍼파라미터 연구)

  • Kim, Hyun-Su;Park, Kwang-Seob
    • Journal of Korean Association for Spatial Structures
    • /
    • v.20 no.2
    • /
    • pp.51-58
    • /
    • 2020
  • Recently, deep learning that is the most popular and effective class of machine learning algorithms is widely applied to various industrial areas. A number of research on various topics about structural engineering was performed by using artificial neural networks, such as structural design optimization, vibration control and system identification etc. When nonlinear semi-active structural control devices are applied to building structure, a lot of computational effort is required to predict dynamic structural responses of finite element method (FEM) model for development of control algorithm. To solve this problem, an artificial neural network model was developed in this study. Among various deep learning algorithms, a recurrent neural network (RNN) was used to make the time history response prediction model. An RNN can retain state from one iteration to the next by using its own output as input for the next step. An eleven-story building structure with semi-active tuned mass damper (TMD) was used as an example structure. The semi-active TMD was composed of magnetorheological damper. Five historical earthquakes and five artificial ground motions were used as ground excitations for training of an RNN model. Another artificial ground motion that was not used for training was used for verification of the developed RNN model. Parametric studies on various hyper-parameters including number of hidden layers, sequence length, number of LSTM cells, etc. After appropriate training iteration of the RNN model with proper hyper-parameters, the RNN model for prediction of seismic responses of the building structure with semi-active TMD was developed. The developed RNN model can effectively provide very accurate seismic responses compared to the FEM model.

Stepwise test case generation for embedded s/w (임베디드 소프트웨어 테스트 케이스 단계적 생성)

  • Jang, S.H.;Jang, J.S.;Lee, S.Y.;Ko, B.G.;Choi, K.H.;Park, S.K.;Jung, K.H.;Lee, M.H.
    • Proceedings of the Korean Operations and Management Science Society Conference
    • /
    • 2004.05a
    • /
    • pp.603-606
    • /
    • 2004
  • Automatic test case generation for testing an embedded software is considered. Existing tools for test case generation such as finite state machine or mutant test usually adopt top down approach and depend upon graphical transition and decision table, which makes it difficult to find out where the bugs exist. Also it is hard to describe the special features of embedded systems such as concurrent execution of individual components. Most of embedded systems interacts with the real world, receiving signals through sensors or switches and sending output signals to actuators that somehow manipulate the environment. Embedded software controls the entire system based on the logics such as interpreting the sensor inputs and making the actuators to start or stop their intended operation. This study proposes an automatic test case generation procedure that tests the system starting from the control logics of sensors, switches and actuators and then their concurrent execution controls, and finally the entire system operation. Such a stepwise approach makes it easy to generate test cases to tell where the bugs of embedded software exist.

  • PDF

A Gaussian process-based response surface method for structural reliability analysis

  • Su, Guoshao;Jiang, Jianqing;Yu, Bo;Xiao, Yilong
    • Structural Engineering and Mechanics
    • /
    • v.56 no.4
    • /
    • pp.549-567
    • /
    • 2015
  • A first-order moment method (FORM) reliability analysis is commonly used for structural stability analysis. It requires the values and partial derivatives of the performance to function with respect to the random variables for the design. These calculations can be cumbersome when the performance functions are implicit. A Gaussian process (GP)-based response surface is adopted in this study to approximate the limit state function. By using a trained GP model, a large number of values and partial derivatives of the performance functions can be obtained for conventional reliability analysis with a FORM, thereby reducing the number of stability analysis calculations. This dynamic renewed knowledge source can provide great assistance in improving the predictive capacity of GP during the iterative process, particularly from the view of machine learning. An iterative algorithm is therefore proposed to improve the precision of GP approximation around the design point by constantly adding new design points to the initial training set. Examples are provided to illustrate the GP-based response surface for both structural and non-structural reliability analyses. The results show that the proposed approach is applicable to structural reliability analyses that involve implicit performance functions and structural response evaluations that entail time-consuming finite element analyses.

An Approach to Verifying Behavioral Compatibility between Objects using Successive Methods Rule (연속 메소드 규칙을 이용한 객체간의 행위적 호환성 검증 기법)

  • Chae, Heung-Seok;Lee, Joon-Sang;Bae, Jung-Ho
    • Journal of KIISE:Software and Applications
    • /
    • v.34 no.9
    • /
    • pp.785-796
    • /
    • 2007
  • In object-oriented systems, objects are organized in hierarchies such that subtypes Inherit and specialize the structure and the behavior of supertypes. Behavioral compatibility is a very crucial issue to permit the substitution between object types, which supports the extension and evolution of object oriented system. This paper proposes successive methods rule that extending methods rule for checking behavioral compatibility between objects on the basis of their dynamic behaviors expressed in finite state machine which is one of the most frequently used notations for expressing dynamic behaviors of object. Based on the classical methods rule, successive methods rule is used for guarantee behavioral compatibility by checking the traces of two objects. And we describe an algorithm for verifying behavioral compatibility between objects using the successive methods rule.

A Development of Intelligent Simulation Tools based on Multi-agent (멀티 에이전트 기반의 지능형 시뮬레이션 도구의 개발)

  • Woo, Chong-Woo;Kim, Dae-Ryung
    • Journal of the Korea Society of Computer and Information
    • /
    • v.12 no.6
    • /
    • pp.21-30
    • /
    • 2007
  • Simulation means modeling structures or behaviors of the various objects, and experimenting them on the computer system. And the major approaches are DEVS(Discrete Event Systems Specification). Petri-net or Automata and so on. But, the simulation problems are getting more complex or complicated these days, so that an intelligent agent-based is being studied. In this paper, we are describing an intelligent agent-based simulation tool, which can supports the simulation experiment more efficiently. The significances of our system can be described as follows. First, the system can provide some AI algorithms through the system libraries. Second, the system supports simple method of designing the simulation model, since it's been built under the Finite State Machine (FSM) structure. And finally, the system acts as a simulation framework by supporting user not only the simulation engine, but also user-friendly tools, such as modeler scriptor and simulator. The system mainly consists of main simulation engine, utility tools, and some other assist tools, and it is tested and showed some efficient results in the three different problems.

  • PDF

Automatic STG Derivation with Consideration of Special Properties of STG-Based Asynchronous Logic Synthesis (신호전이그래프에 기반한 비동기식 논리합성의 고유한 특성을 고려한 신호전이그래프의 자동생성)

  • Kim, Eui-Seok;Lee, Jeong-Gun;Lee, Dong-Ik
    • The KIPS Transactions:PartA
    • /
    • v.9A no.3
    • /
    • pp.351-362
    • /
    • 2002
  • Along with an asynchronous finite state machine, in short AFSM, a signal transition graph, in short STG, is one of the most widely used behavioral description languages for asynchronous controllers. Unfortunately, STGs are not user-friendly, and thus it is very unwieldy and time consuming for system designers to conceive and describe manually the behaviors of a number of asynchronous controllers which constitute an asynchronous control unit for a target system in the form of STGs. In this paper, we suggest an automatic STG derivation method through a process-oriented method. Since the suggested method considers special properties of STG-based asynchronous logic synthesis very carefully, asynchronous controllers which are synthesized from STGs derived through the suggested method are superior in aspects of area, synthesis time, performance and implementability compared to those obtained through previous methods.

Co-specification for control and dataflow based on the codesign backplane (백플레인에 기반한 제어 부분과 데이터 처리 부분의 통합적 명세)

  • Kim, Do-Hyung;Ha, Soon-Hoi
    • Journal of the Korean Institute of Telematics and Electronics C
    • /
    • v.36C no.12
    • /
    • pp.36-46
    • /
    • 1999
  • As the requirements of embedded systems increase, the design complexity of the system becomes higher. The formal design methodology is required which supports well-balanced specification for control and dataflow to design a complex system. In this paper, control modules and function modules are separately described with FSMs and dataflow graphs respectively, and integrated into a system specification via inter-model communications. In previous approaches, the system could not be verified until control modules and dataflow modules are combined at the final design stage. However our approach enables us to design each part as the proper model of computation at early stage, and to verify the compositions and to co-synthesize the system effectively in the same framework. Especially this paper focuses on the communication protocols between control and dataflow models. Preliminary experiments show practicality of the proposed technique.

  • PDF

Modeling and Interoperability Test Case Generation of a Real-Time QoS Monitoring Protocol

  • Chin, Byoung-Moon;Kim, Sung-Un;Kang, Sung-Won;Park, Chee-Hang
    • ETRI Journal
    • /
    • v.21 no.4
    • /
    • pp.52-64
    • /
    • 1999
  • QoS monitoring is a kind of real-time systems which allows each level of the system to track the ongoing QoS levels achieved by the lower network layers. For these systems, real-time communications between corresponding transport protocol objects is essential for their correct behavior. When two or more entities are employed to perform a certain task as in the case of communication protocols, the capability to do so is called interoperability and considered as the essential aspect of correctness of communication systems. This paper describes a formal approach on modeling and interoperability test case generation of a real-time QoS monitoring protocol. For this, we specify the behavior of flow monitoring of transport layer QoS protocol, i.e., METS protocol, which is proposed to address QoS from an end-to-end's point of view, based on QoS architecture model which includes ATM net work in lower layers. We use a real-time Input/Output finite State Machine to model the behavior of real-time flow monitoring over time. From the modeled real-time I/OFSM, we generate interoperability test cases to check the correctness of METS protocol's flow monitoring behaviors for two end systems. A new approach to efficient interoperability testing is described and the method of interoperability test cases generation is shown with the example of METS protocol's flow monitoring. The current TTCN is not appropriate for testing real-time and multimedia systems. Because test events in TTCN are for message-based system and not for stream-based systems, the real-time in TTCN can only be approximated. This paper also proposes the notation of real-time Abstract Test Suite by means of real-time extension of TTCN. This approach gives the advantages that only a few syntactical changes are necessary, and TTCN and real-time TTCN are compatible. This formal approach on interoperability testing can be applied to the real-time protocols related to IMT-2000, B-ISDN and real-time systems.

  • PDF