• Title/Summary/Keyword: Field effect transistor (FET)

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The Characteristics of Molecular Conjugated Optical Sensor Based on Silicon Nanowire FET

  • Lee, Dong-Jin;Kim, Tae-Geun;Hwang, Dong-Hun;Hwang, Jong-Seung;Hwang, Seong-U
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.486-486
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    • 2013
  • Silicon nanowire devices fabricated by bottom-up methods are attracted due to their electrical, mechanical, and optical properties. Especially, to functionalize the surface of silicon nanowires by molecules has received interests. The changes in the characteristics of the molecules is delivered directly to the surface of the silicon nanowires so that the silicon nanowire can be utilized as an efficient read-out device by using the electronic state change of molecules. The surface treatment of the silicon nanowire with light-sensitive molecules can change its optical characteristics greatly. In this paper, we present the optical response of a SiNW field-effect-transistor (FET) conjugated with porphyrin molecules. We fabricated a SiNW FET and performed porphyrin conjugation on its surface. The characteristic and the optical response of the device shows a large difference after conjugation while there is not much change of the surface in the SEM observation. It attributed to the existence of few layer porphyrin molecules on the SiNW surface and efficient variation of the surface potential of the SiNW due to light irradiation.

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Analysis of Subthreshold Behavior of FinFET using Taurus

  • Murugan, Balasubramanian;Saha, Samar K.;Venkat, Rama
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.7 no.1
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    • pp.51-55
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    • 2007
  • This paper investigates the subthreshold behavior of Fin Field Effect Transistor (FinFET). The FinFET is considered to be an alternate MOSFET structure for the deep sub-micron regime, having excellent device characteristics. As the channel length decreases, the study of subthreshold behavior of the device becomes critically important for successful design and implementation of digital circuits. An accurate analysis of subthreshold behavior of FinFET was done by simulating the device in a 3D process and device simulator, Taurus. The subthreshold behavior of FinFET, was measured using a parameter called S-factor which was obtained from the $In(I_{DS})\;-\;V_{GS}$ characteristics. The value of S-factor of devices of various fin dimensions with channel length $L_g$ in the range of 20 nm - 50 nm and with the fin width $T_{fin}$ in the range of 10 nm - 40 nm was calculated. It was observed that for devices with longer channel lengths, the value of S-factor was close to the ideal value of 60 m V/dec. The S-factor increases exponentially for channel lengths, $L_g\;<\;1.5\;T_{fin}$. Further, for a constant $L_g$, the S factor was observed to increase with $T_{fin}$. An empirical relationship between S, $L_g$ and $T_{fin}$ was developed based on the simulation results, which could be used as a rule of thumb for determining the S-factor of devices.

Study of Electron Injection of Pentacene Field Effect Transistor with Au Electrodes by C-V and SHG Measurements

  • Lim, Eun-Ju;Manaka, Takaaki;Tamura, Ryosuke;Ohshima, Yuki;Iwamoto, Mitsumasa
    • Transactions on Electrical and Electronic Materials
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    • v.9 no.4
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    • pp.151-155
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    • 2008
  • Using pentacene field effect transistors (FETs) with Au source and drain electrodes, electron injection from the Au electrodes into the pentacene was investigated. The capacitance-voltage (C-V) and optical second harmonic generation (SHG) measurements were employed. Electron injection from the Au electrodes was suggested by the hysteresis behavior with the C-V characteristics and slowly decaying SHG signal under DC biasing, A mechanism of hole-injection assisted by trapped electrons is proposed. To confirm electron injection process, light-emitting behavior under the application of AC applied voltage was observed.

Enhanced Photoresponse of Plasmonic Terahertz Wave Detector Based on Silicon Field Effect Transistors with Asymmetric Source and Drain Structures

  • Ryu, Min Woo;Kim, Sung-Ho;Kim, Kyung Rok
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.13 no.6
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    • pp.576-580
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    • 2013
  • We investigate the enhanced effects of asymmetry ratio variations of the source and drain area in silicon (Si) field-effect transistor (FET). Photoresponse according to the variation of asymmetry difference between the width of source and drain are obtained by using the plasmonic terahertz (THz) wave detector simulation based on technology computer-aided design (TCAD) with the quasi-plasma 2DEG model. The simulation results demonstrate the potential of Si FETs with asymmetric source and drain structures as the promising plasmonic THz detectors.

A Study on Implanted and Annealed Antimony Profiles in Amorphous and Single Crystalline Silicon Using 10~50 keV Energy Bombardment (비정질 및 단결정 실리콘에서 10~50 keV 에너지로 주입된 안티몬 이온의 분포와 열적인 거동에 따른 연구)

  • Jung, Won-Chae
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.28 no.11
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    • pp.683-689
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    • 2015
  • For the formation of $N^+$ doping, the antimony ions are mainly used for the fabrication of a BJT (bipolar junction transistor), CMOS (complementary metal oxide semiconductor), FET (field effect transistor) and BiCMOS (bipolar and complementary metal oxide semiconductor) process integration. Antimony is a heavy element and has relatively a low diffusion coefficient in silicon. Therefore, antimony is preferred as a candidate of ultra shallow junction for n type doping instead of arsenic implantation. Three-dimensional (3D) profiles of antimony are also compared one another from different tilt angles and incident energies under same dimensional conditions. The diffusion effect of antimony showed ORD (oxygen retarded diffusion) after thermal oxidation process. The interfacial effect of a $SiO_2/Si$ is influenced antimony diffusion and showed segregation effects during the oxidation process. The surface sputtering effect of antimony must be considered due to its heavy mass in the case of low energy and high dose conditions. The range of antimony implanted in amorphous and crystalline silicon are compared each other and its data and profiles also showed and explained after thermal annealing under inert $N_2$ gas and dry oxidation.

Reduction of Source/Drain Series Resistance in Fin Channel MOSFETs Using Selective Oxidation Technique (선택적 산화 방식을 이용한 핀 채널 MOSFET의 소스/드레인 저항 감소 기법)

  • Cho, Young-Kyun
    • Journal of Convergence for Information Technology
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    • v.11 no.7
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    • pp.104-110
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    • 2021
  • A novel selective oxidation process has been developed for low source/drain (S/D) series resistance of the fin channel metal oxide semiconductor field effect transistor (MOSFET). Using this technique, the selective oxidation fin-channel MOSFET (SoxFET) has the gate-all-around structure and gradually enhanced S/D extension regions. The SoxFET demonstrated over 70% reduction in S/D series resistance compared to the control device. Moreover, it was found that the SoxFET behaved better in performance, not only a higher drive current but also higher transconductances with suppressing subthreshold swing and drain induced barrier lowering (DIBL) characteristics, than the control device. The saturation current, threshold voltage, peak linear transconductance, peak saturation transconductance, subthreshold swing, and DIBL for the fabricated SoxFET are 305 ㎂/㎛, 0.33 V, 13.5 𝜇S, 76.4 𝜇S, 78 mV/dec, and 62 mV/V, respectively.

Investigation of characteristic on Solution-Processed Al-Zn-Sn-O Pseudo Metal-Oxide-Semiconductor Field-Effect-Transistor using microwave annealing

  • Kim, Seung-Tae;Mun, Seong-Wan;Jo, Won-Ju
    • Proceedings of the Korean Vacuum Society Conference
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    • 2015.08a
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    • pp.206.2-206.2
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    • 2015
  • 최근 비정질 산화물 반도체 thin film transistor(TFT)는 차세대 투명 디스플레이로 많은 관심을 받고 있으며 활발한 연구가 진행되고 있다. 산화물 반도체 TFT는 기존의 비정질 실리콘 반도체에 비하여 큰 on/off 전류비, 높은 이동도 그리고 낮은 구동전압으로 인하여 차세대 투명 디스플레이 산업에 적용 가능하다는 장점이 있다. 한편 기존의 sputter나 evaporator를 이용한 증착 방식은 우수한 막의 특성에도 불구하고 많은 시간과 제작비용이 든다는 단점을 가지고 있다. 따라서 본 연구에서는 별도의 고진공 시스템이 필요하지 않을 뿐만 아니라 대면적화에도 유리한 용액공정 방식을 이용하여 박막 트렌지스터를 제작하였으며 thermal 열처리와 microwave 열처리 방식에 따른 전기적 특성을 비교 및 분석하고 각 열처리 방식의 열처리 온도 및 조건을 최적화 하였다. 제작된 박막 트렌지스터는 p-type bulk silicon 위에 산화막이 100 nm 형성된 기판에 spin coater을 이용하여 Al-Zn-Sn-O 박막을 형성하였다. 연속해서 photolithography 공정과 BOE (30:1) 습식 식각 과정을 이용해 활성화 영역을 형성하여 소자를 제작하였다. 제작 된 소자는 Pseudo-MOS FET구조이며, 프로브 탐침을 증착 된 채널층 표면에 직접 접촉시켜 소스와 드레인 역할을 대체하여 동작시킬 수 있어 전기적 특성평가가 용이하다는 장점을 가지고 있다. 그 결과, microwave를 통해 열처리한 소자는 100oC 이하의 낮은 열처리 온도에도 불구하고 furnace를 이용하여 열처리한 소자와 비교하여 subthreshold swing(SS), Ion/off ratio, field-effectmobility 등이 개선되는 것을 확인하였다. 따라서, microwave 열처리 공정은 향후 저온 공정을 요구하는 MOSFET 제작 시의 훌륭한 대안으로 사용 될 것으로 기대된다.

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pH Sensitive Graphene Field-Effect Transistor(FET) (pH에 민감한 그래핀 전계효과 트랜지스터(FET))

  • Park, Woo Hwan;Song, Kwang Soup
    • Journal of the Institute of Electronics and Information Engineers
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    • v.53 no.2
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    • pp.117-122
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    • 2016
  • Recently, the detection of pH with real-time and in vivo has been focal pointed in the environmental or medical fields. In this work, we developed the pH sensor using graphene sheet. Graphene has high biocompatibility. We fabricated flexible solution-gated field-effect transistors (SGFETs) on graphene sheet transferred on the polyethylene terephthalate (PET) substrate to detect pH in electrolyte solution. The gate length was $500{\mu}m$ and the gate width was 8 mm. We evaluated the current-voltage (I-V) transfer characteristics of graphene SGFETs in pH solution. The drain-source current ($I_{DS}$) and the gate-source voltage ($V_{GS}$) curves of graphene SGFETs were depended on pH value. The Dirac point of graphene SGFETs linearly shifted to the positive direction about 19.32 mV/pH depending on the pH value in electrolyte solution.

Fabrication of wrap-around gate nanostructures from electrochemical deposition (전기화학적 도금을 이용한 wrap-around 게이트 나노구조의 제작)

  • Ahn, Jae-Hyun;Hong, Su-Heon;Kang, Myung-Gil;Hwang, Sung-Woo
    • Journal of IKEEE
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    • v.13 no.2
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    • pp.126-131
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    • 2009
  • To overcome short channel effects, wrap-around field effect transistors have drawn a great deal of attention for their superior electrostatic coupling between the channel and the surrounding gate electrode. In this paper, we introduce a bottom-up technique to fabricate a wrap-around field effect transistor using silicon nanowires as the conduction channel. Device fabrication was consisted mainly of electron-beam lithography, dielectrophoresis to accurately align the nanowires, and the formation of gate electrode using electrochemical deposition. The electrolyte for electrochemical deposition was made up of non-toxic organic-based solution and liquid nitrogen was used as a method of maintaining the shape of polymethyl methacrylate(PMMA) during the process of electrochemical deposition. Patterned PMMA can be used as a nano-template to produce wrap-around gate nano-structures.

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Design of a Microwave Active Resonator Using Defected Ground Structure with Islands (DGSI) (격리패턴을 지닌 결함접지구조를 이용한 초고주파용 능동공진기)

  • Hwang, Mun-Su;Oh, Seong-Min;Ahn, Dal;Lim, Jong-Sik
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.56 no.10
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    • pp.1814-1819
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    • 2007
  • A new active resonator using defected ground structure with islands (DGSI) is proposed. The proposed resonator is composed of the conventional microstrip line with DGSI and negative resistance of active devices. The negative resistance part is realized by field effect transistor (FET) series feedback circuits. The characteristic of the proposed resonator with DGSI is improved by combining the negative resistance part with the parallel microstrip line structure with islands, where the electric field is formed the most strongly. The measured improvement of the proposed active resonator with DGSI are 4.55dB and 0.32dB in S21 and S22, respectively, at the resonant frequency whorl it is compared to the existing passive resonator having DGSI only.