• 제목/요약/키워드: Feed-Through Voltage

검색결과 64건 처리시간 0.024초

대면적 고화질 TFT-LCD의 Feed-through 전압 보상을 위한 Gate Driving 방법 (Gate Driving Methods to Compensate Feed-Through Voltage for Large Size, High Quality TFT-LCD)

  • 정순신;윤영준;박재우;최종선
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1999년도 추계학술대회 논문집
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    • pp.99-102
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    • 1999
  • In recent years, attempts have been made to greatly improve the display quality of active-matrix liquid crystal display devices, and many techniques have been proposed to solve such problems as gate signal delay, feed-through voltage and image sticking. To improve these problems which are caused by the fried-through voltage, we have evaluated new driving methods to reduce the fled-through voltage. Two level gate-pulse was used for the gate driving of the cst-on-common structure pixels. And two-gate line driving methods with the optimized gate signals were applied for the cst-on-gate structure pixels. These gate driving methods were better feed-through characteristics than conventional simple gate pulse. The evaluation of the suggested driving methods were performed by using a TFT-LCD array simulator PDAST which can simulate the gate, data and pixel voltages of a certain pixel at any time and at any location on a TFT array. The effect of the new driving method was effectively analyzed.

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Optimized Gate Driving to Compensate Feed-through Voltage for $C_{ST}-on-Common$

  • Jung, Soon-Shin;Yun, Young-Jun;Park, Jae-Woo;Roh, Won-Yeol;Choi, Jong-Sun
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2000년도 제1회 학술대회 논문집
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    • pp.73-74
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    • 2000
  • In recent years, attempts have been made to greatly improve the display quality of active-matrix liquid crystal display devices, and many techniques have been proposed to solve such problems as gate signal delay, feed-through voltage and image sticking[1-3]. To improve these problems which are caused by the feed-through voltage, we have evaluated new driving methods to reduce the feed-through voltage. Two level gate-pulse was used for the gate driving of the cst-on-common structure pixels. These gate driving methods offer better feed-through characteristics than conventional simple gate pulse. Optimized step signal will compensate by step pulse time and voltage. The evaluation of the suggested driving methods were performed by using a TFT-LCD array simulator PDAST which can simulate the gate, data and pixel voltages of a certain pixel at any time and at any location on a TFT array. The effect of the new driving method was effectively analyzed.

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Research on the Mechanism of Neutral-point Voltage Fluctuation and Capacitor Voltage Balancing Control Strategy of Three-phase Three-level T-type Inverter

  • Yan, Gangui;Duan, Shuangming;Zhao, Shujian;Li, Gen;Wu, Wei;Li, Hongbo
    • Journal of Electrical Engineering and Technology
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    • 제12권6호
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    • pp.2227-2236
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    • 2017
  • In order to solve the neutral-point voltage fluctuation problem of three-phase three-level T-type inverters (TPTLTIs), the unbalance characteristics of capacitor voltages under different switching states and the mechanism of neutral-point voltage fluctuation are revealed. Based on the mathematical model of a TPTLTI, a feed-forward voltage balancing control strategy of DC-link capacitor voltages error is proposed. The strategy generates a DC bias voltage using a capacitor voltage loop with a proportional integral (PI) controller. The proposed strategy can suppress the neutral-point voltage fluctuation effectively and improve the quality of output currents. The correctness of the theoretical analysis is verified through simulations. An experimental prototype of a TPTLTI based on Digital Signal Processor (DSP) is built. The feasibility and effectiveness of the proposed strategy is verified through experiment. The results from simulations and experiment match very well.

전향보상 전압의 위상 변화를 통한 단독운전 검출 방법의 계통 정상 상태의 성능 평가 (Performance Evaluation of Islanding Detection Method by Phase Shifted Feed-Forward Voltage in Steady-State Grid Condition)

  • 김동욱;김성민
    • 전력전자학회논문지
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    • 제23권6호
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    • pp.373-380
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    • 2018
  • This study proposes a new islanding detection method that uses the phase shift of feed-forward voltage and evaluates the performance of an existing method and the proposed method when the grid frequency changes within the allowable range under steady-state conditions. The investigated existing method, which is slip mode frequency shift (SMS), uses current phase shift to detect islanding. The SMS method supplies reactive current to the grid under this condition, but the proposed method does not generate additional reactive power because it does not depend on the current control loop. The performance in steady-state grid condition is evaluated through simulations and experiments.

TFT-LCD 공통 전극 전압 분포에 따른 화소 특성 시뮬레이션 (Simulations of Effects of Common Electrode Voltage Distributions on Pixel Characteristics in TFT -LCD)

  • 김태형;박재우;김진홍;최종선
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2000년도 춘계학술대회 논문집 디스플레이 광소자 분야
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    • pp.165-168
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    • 2000
  • An active-matrix LCD using thin film transistors (TFT) has been widely recognized as having potential for high-quality color fiat-panel displays. Pixel-Design Array Simulation Tool (PDAST) was used to profoundly understand the gate signal distortion and pixel charging capability, which are the most critical limiting factors for high-quality TFT-LCDs. In addition, PDAST can estimate voltage distributions in common electrode which can affect pixel voltage and feed-through voltage. Since PDAST can simulate the gate, data and the pixel voltages of a certain pixel on TFT array at any time and at any location on an array, the effect of common electrode voltage can be effectively analyzed. The information obtained from this study could be utilized to design the larger area and finer image quality panel.

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시간지연 제어기법을 이용한 새로운 데드 타임 보상법 (A New Dead-Time Compenstion Method using Time Delay Control Approach)

  • 김현수
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2000년도 전력전자학술대회 논문집
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    • pp.425-428
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    • 2000
  • A new dead time compensation method using time delay control approach is presented. The dead time in switching pattern cause the voltage distortion and it can be considered as the disturbance voltage. In this paper the disturbance voltage is estimated using time delay control and the estimated disturbance voltage is summed with voltage command in predictive current control by a feed-forward. The proposed scheme is implemented on a PMSM and the effectiveness is verified through comparative simulation.

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고속철도 시스템의 레일 전위 상승 해석 (Analysis on Voltage Rise of Rail in High speed Railway System)

  • 이종우
    • 대한전기학회논문지:전력기술부문A
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    • 제52권8호
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    • pp.481-485
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    • 2003
  • In electric railway system, potential of rail has been risen, for return-current flows through rail. The magnitude of rising voltage is different to railway feed system, ground admittance of rail and the load current. If rising voltage of rail is large, electric shock can be occurred to passengers and maintenance- worker, In this paper, we estimate the rising voltage of rail in high speed railway system and check the safety to human beings.

GMAW에서 와이어 송급속도의 변동이 아크안정성에 미치는 영향에 관한 연구 (Effects of Wire speed Fluctuation on Arc Stability in GMA Welding)

  • 신현욱;최용범;성원호;장희석
    • Journal of Welding and Joining
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    • 제13권4호
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    • pp.85-102
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    • 1995
  • Weld quality of GMA welding processes is closely related to arc stability. Although many researches on arc stability have been performed, real-time estimation of arc stability has not been attempted. For instance, Mita proposed a off-line statistical method in which short circuiting and arcing time, and voltage and current wave forms were sampled to assess arc stability. But this method is not suitable to assess arc stability for GMA welder which employ inverter power source due to its controlled current and voltage wave forms. In this paper, the relationship between are stability and wire feed rate fluctuation is analyzed to propose new criterion for inverter power source. When arc voltage and arc current and arcing time are analyzed, we can assess arc stability only for short circuit transfer mode. When wire feed rate is analyzed, we can estimate arc stability udner the condition of spray transfer mode as well. Hence, the wire feed rate is chosen for monitoring process variable to cover possible metal transfer modes in GMAW. Through this research, it has been identified that arc stability in GMA welding processes is closely related to wire fed rate. When inverter power source is used, conventional statistical method of estimating arc stability, such as Mita index, is no longer valid due to its controlled voltage and current wave forms. Arc stability has been also examined in phase plane diagram.

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플라즈마 이온주입 공구의 가공조건이 절삭력과 표면 거칠기에 미치는 영향 분석 (Analysis of the Effects of Cutting Force and Surface Roughness in the Cutting Conditions of Plasma Source Ion Implantation Tools)

  • 강성기
    • 한국생산제조학회지
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    • 제21권5호
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    • pp.755-760
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    • 2012
  • In this study, three dimensional cutting force components and surface roughness appeared in high speed cutting by using tungsten carbide endmill tools implanted ion or not found mutual relations through several analysis of statistical dispersion. It is showed that cutting force(Fx) is affect with spindle speed and feed rate, cutting force(Fy) is affect with spindle speed and ion implantation time and cutting force(Fz) is affect with feed rate in interaction through the statistical method of ANOVA of cutting force and surface roughness, it is analyzed that it is affected of spindle speed and feed rate in surface roughness.

분산 발전 시스템에서 계통연계 인버터의 매끄러운 모드 전환 (Grid Connected Inverter of ESS for Seamless mode Transition)

  • 홍창표;김학원;조관열
    • 전력전자학회논문지
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    • 제21권4호
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    • pp.364-372
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    • 2016
  • In this paper, a voltage controller for the seamless transition of a grid-connected inverter for ESS is proposed. The single-phase inverter is operated as a current controller when the grid is connected and as a voltage controller in the stand-alone mode when the grid is disconnected. Generally, in the case of grid recovery, the overcurrent may flow into the system because of the mismatch phase between the inverter output and grid voltages. The proposed controller resolves the overcurrent problem through phase delay problems with initial value feed-forward control of the integrator when the grid voltage is restored. The effects of the control method are simulated through PSIM, and the usefulness of the control method is verified through experiments.