• Title/Summary/Keyword: Fault-Tolerant Computer

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Fine Grained Security in Cloud with Cryptographic Access Control

  • Aparna Manikonda;Nalini N
    • International Journal of Computer Science & Network Security
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    • v.24 no.7
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    • pp.123-127
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    • 2024
  • Cloud computing services has gained increasing popularity in recent years for supporting various on demand and scalable services for IT consumers where there is a need of less investment towards infrastructure. While storage architecture of cloud enjoys a more robust and fault-tolerant cloud computing network, such architecture also poses a number of security challenges especially when applied in applications related to social networks, Financial transactions, etc. First, as data are stored and maintained by individual virtual machines so Cloud resources are prone to hijacked. Such attacks allow attackers to create, modify and delete machine images, and change administrative passwords and settings successfully. hence, it is significantly harder to ensure data security. Second, Due to dynamic and shared nature of the Cloud, data may be compromised in many ways. Last but not least, Service hijacking may lead to redirect client to an illegitimate website. User accounts and service instances could in turn make a new base for attackers. To address the above challenges, we propose in this paper a distributed data access control scheme that is able to fulfil fine-grained access control over cloud data and is resilient against strong attacks such as compromise and user colluding. The proposed framework exploits a novel cryptographic primitive called attribute-based encryption (ABE), tailors, and adapts it for cloud computing with respect to security requirements

DESIGN AND IMPLEMENTATION OF THE SMALL SATELLITE ON-BOARD COMPUTER SYSTEM : KASCOM (소형위성의 제어를 위한 컴퓨터 시스템의 설계 및 구현)

  • 김기형;김형신;박재현;박규호;최순달
    • Journal of Astronomy and Space Sciences
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    • v.13 no.2
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    • pp.52-66
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    • 1996
  • In this paper, we present the design methodology of KASCOM(KAIST satellite computer), the experimental on-board computer system of KITSAT-2. The design of the on-board computer system should consider the following constraints: operational throughput, fault tolerant input-output, low power, size, weight, and radiation hardness. KASCOM is designed to satisfy these constraints. This paper also presents the implementation and testing details of KASCOM. Finally, the in-orbit operational results are presented. The results show that about 2 SEU errors occur for the program memory(1Mbit SRAM) in a day, while 3.7 SEU errors occur for the data memory(4Mbit SRAM). This implies that high-integrated memories are more susceptible to the radiation environment than low-integrated memories.

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Analysis of the problems in(SMRT) L-CTC and derivation of measures (서울도시철도(SMRT) L-CTC의 문제점 분석 및 해결 방안 도출)

  • Park, Geum-Heui;Lee, Jong-Woo
    • Proceedings of the KSR Conference
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    • 2008.11b
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    • pp.1204-1212
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    • 2008
  • This study enables to troubleshoot the problems of the existing dual system with the help of the implementation of totally dualized fault-tolerant system to L-CTC computer and HADAX, and equipments are simplified and systems are modernized with the addition of the control function, as a upgraded LCP control system, to L-CTC computer on the basis of WINDOWS based O/S switched from DOS environment. An error on Microlok, which is aninterlocking apparatus, forwarded to L-CTC computer ensures to handle the false data during the operation of the system. This paper discusses a sure way to prevent the deterioration of (SMRT) L-CYC system and to bolster its stability with formation of the dual system. Additionally, WINDOW based O/S consisting of L-CTC computer leads to simplification and modernization of facilities and enhances maintenance functions offering centralization for branch offices and machine rooms as well.

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Computing and Reducing Transient Error Propagation in Registers

  • Yan, Jun;Zhang, Wei
    • Journal of Computing Science and Engineering
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    • v.5 no.2
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    • pp.121-130
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    • 2011
  • Recent research indicates that transient errors will increasingly become a critical concern in microprocessor design. As embedded processors are widely used in reliability-critical or noisy environments, it is necessary to develop cost-effective fault-tolerant techniques to protect processors against transient errors. The register file is one of the critical components that can significantly affect microprocessor system reliability, since registers are typically accessed very frequently, and transient errors in registers can be easily propagated to functional units or the memory system, leading to silent data error (SDC) or system crash. This paper focuses on investigating the impact of register file soft errors on system reliability and developing cost-effective techniques to improve the register file immunity to soft errors. This paper proposes the register vulnerability factor (RVF) concept to characterize the probability that register transient errors can escape the register file and thus potentially affect system reliability. We propose an approach to compute the RVF based on register access patterns. In this paper, we also propose two compiler-directed techniques and a hybrid approach to improve register file reliability cost-effectively by lowering the RVF value. Our experiments indicate that on average, RVF can be reduced to 9.1% and 9.5% by the hyperblock-based instruction re-scheduling and the reliability-oriented register assignment respectively, which can potentially lower the reliability cost significantly, without sacrificing the register value integrity.

A Network Fault-tolerant Software Streaming Technology (네트워크 고장감내 소프트웨어 스트리밍 기술)

  • Shim, Jeong-Min;Kim, Won-Young;Choi, Wan
    • Proceedings of the Korea Contents Association Conference
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    • 2004.11a
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    • pp.437-441
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    • 2004
  • As the development of networks and computer systems, users want various services. To meet user's various needs, new technologies is developed and a software streaming technology, uses software with streaming technology, is newly coming out. If network trouble occurs, the software is not available because the streaming server can't send the binary code that software needs to be executed in the streaming service based on network environment. In this paper, we propose the management technology of software binary code in client that managing the binary codes classfied by the function kept in the local storage device, provides the service continuously after the network trouble with the given binary code previously not the binary code from the server.

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WiCoin : Wireless LAN Sharing Using Block Chain Technology (와이코인 : 블록체인 기술을 이용한 무선랜 공유)

  • Kim, Woo-Seong;Ryu, Kyoung-Ho;Park, Yang-Jae
    • Journal of Digital Convergence
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    • v.17 no.1
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    • pp.195-201
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    • 2019
  • This paper proposes a blockchain system to share Wireless Local Area Network (WLAN) that recently suffers from mutual interference among increasing devices using unlicensed bands. Blockchain technology can induce cooperation from users by incentivizing them with cryptocurrency like shown in Bitcoin example. In this paper, we describe Blockchain based access mechanism in WLAN instead of conventional authentication based access. Here, users can access any WLAN access point by paying through smart contract while they also receive payment from others. In order to support real-time transaction, we apply proof-of-authority that is realized by Byzantine fault tolerant protocol instead of well-known proof-of-work that requires huge computing power and delay.

A Fault Tolerant Transaction Management in Multidatabase Systems (멀티 데이타베이스 시스템에서 고장을 허용하는 트랜잭션 관리)

  • Sin, Seong-Cheol;Hwang, Bu-Hyeon
    • The Transactions of the Korea Information Processing Society
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    • v.1 no.2
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    • pp.172-183
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    • 1994
  • In the multidatabase systems(MDBS), local autonomy and global consistency are important issues. Global consistency could be maintained by a global concurrency control algorithm and a global recovery algorithm. In this thesis, we propose a global concurrency control algorithm to ensure local autonomy and to guarantee global serializability, and a global recovery algorithm which is possible to recover the multudatabase from any failures. The proposed global concurrency control algorithm uses bottom-up approach, based on three-level transaction processing model. It can produce a local history that the execution order of subtransactions is identical to their serialization order by using dummy-operations in the server when an indirect conflict is caused between subtransactions due to local transactions. At the global module, it can efficiently validate global serializability of global transactions by checking global serializability only for the global transactions which conflict with each other.

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Availability Analysis of Cluster Web Server System using Software Rejuvenation Method (소프트웨어 재활 기법을 사용한 클러스터 웹서버 시스템의 가용도 분석)

  • 강창훈
    • Journal of the Korea Computer Industry Society
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    • v.3 no.1
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    • pp.77-84
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    • 2002
  • An cluster system used consist of large number of running servers, one has the problem that does the low availability occured by the high chance of the server failures and it is difficult to provide occuring software aging. In this paper, running cluster web servers consists of n primary servers and k backup servers, based on the operational parameters such as number of running primary servers, number of backup severs, rejuvenation period, rejuvenation time, failure rate of sewers, repair rate of servers, unstable rate of servers. We calculate to evaluate the rejuvenation policy such steady-state probabilities, downtime, availability, and downtime cost. We validate the solutions of mathematical model by experiments based on various operation parameters and find that the software rejuvenation method can be adopted as prventive fault tolerant technique for stability of system. The failure rate and unstable rate of the servers are essential factors for decision making of the rejuvenation policies.

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An Improvement of Fault Tolerant for Routing using Secondary Header in CBRP (CBRP에서 보조헤더를 이용한 라우팅 고장 극복 개선)

  • 허태성;이균하
    • Journal of the Korea Computer Industry Society
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    • v.2 no.7
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    • pp.983-996
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    • 2001
  • Mobile Ad Hoc Network (MANET) is a network architecture which has no backborn network and is deployed temporarily and rapidly in emergency or war without fixed mobile infrastructures. All communications between network entities are carried in ad-hoc networks over the wireless medium. Due to the radio communications being extremely vulnerable to propagation impairments, connectivity between network nodes is not guaranteed. Therefore, previously developed routing algorithms in wired networks cannot be used. And many new algorithms have been undergone. This study proposes the Secondary Header approach to the cluster based routing protocol (CBRP). In case, the main header becomes abnormal status so that the main header can not participate the communications between network entities, the secondary header immediately replaces the primary header without selecting process of the new primary header. The performances of proposed algorithm CBRP-SH(Cluster Based Routing Protocol using Secondary Header) are compared with CBRP and results are presented in order to show the effectiveness of the algorithm.

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A Hardware Barrier Synchronization using Multi -drop Scheme in Parallel Computer Systems (병렬 컴퓨터 시스템에서의 Multi-drop 방식을 사용한 하드웨어 장벽 동기화)

  • Lee, June-Bum;Kim, Sung-Chun
    • Journal of KIISE:Computer Systems and Theory
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    • v.27 no.5
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    • pp.485-495
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    • 2000
  • The parallel computer system that uses parallel program on the application such as a large scale business or complex operation is required. One of crucial operation of parallel computer system is synchronization. A representative method of synchronization is barrier synchronization. A barrier forces all process to wait until all the process reach the barrier and then releases all of the processes. There are software schemes, hardware scheme, or combinations of these mechanism to achieve barrier synchronization which tends to use hardware scheme. Besides, barrier synchronization lets parallel computer system fast because it has fewer start-up overhead. In this paper, we propose a new switch module that can implement fast and fault-tolerant barrier synchronization in hardware scheme. A proposed barrier synchronization is operated not in full-switch-driven method but in processor-driven method. An effective barrier synchronization is executed with inexpensive hardware supports. Therefore, a new proposed hardware barrier synchronization is designed that it is operated in arbitrary network topology. In this paper, we only show comparison of barrier synchronization on Multistage Interconnection Network. This research results in 24.6-24.8% reduced average delay. Through this result, we can expect lower average delay in irregular network.

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