• 제목/요약/키워드: Fault Detection Coverage

검색결과 35건 처리시간 0.029초

Fault Coverage 요구사항 최적할당을 위한 모델링에 관한 연구 (A Study on Modeling for Optimized Allocation of Fault Coverage)

  • 황종규;정의진;이종우
    • 한국철도학회:학술대회논문집
    • /
    • 한국철도학회 2000년도 춘계학술대회 논문집
    • /
    • pp.330-335
    • /
    • 2000
  • Faults detection and containment requirements are typically allocated from a top-level specification as a percentage of total faults detection and containment, weighted by failure rate. This faults detection and containments are called as a fault coverage. The fault coverage requirements are typically allocated identically to all units in the system, without regard to complexity, cost of implementation or failure rate for each units. In this paper a simple methodology and mathematical model to support the allocation of system fault coverage rates to lower-level units by considering the inherent differences in reliability is presented. The models are formed as a form of constrained optimization. The objectives and constraints are modeled as a linear form and this problems are solved by linear programming. It is identified by simulation that the proposed solving methods for these problems are effective to such requirement allocating.

  • PDF

FAULT DETECTION COVERAGE QUANTIFICATION OF AUTOMATIC TEST FUNCTIONS OF DIGITAL I&C SYSTEM IN NPPS

  • Choi, Jong-Gyun;Lee, Seung-Jun;Kang, Hyun-Gook;Hur, Seop;Lee, Young-Jun;Jang, Seung-Cheol
    • Nuclear Engineering and Technology
    • /
    • 제44권4호
    • /
    • pp.421-428
    • /
    • 2012
  • Analog instrument and control systems in nuclear power plants have recently been replaced with digital systems for safer and more efficient operation. Digital instrument and control systems have adopted various fault-tolerant techniques that help the system correctly and safely perform the specific required functions regardless of the presence of faults. Each fault-tolerant technique has a different inspection period, from real-time monitoring to monthly testing. The range covered by each faulttolerant technique is also different. The digital instrument and control system, therefore, adopts multiple barriers consisting of various fault-tolerant techniques to increase the total fault detection coverage. Even though these fault-tolerant techniques are adopted to ensure and improve the safety of a system, their effects on the system safety have not yet been properly considered in most probabilistic safety analysis models. Therefore, it is necessary to develop an evaluation method that can describe these features of digital instrument and control systems. Several issues must be considered in the fault coverage estimation of a digital instrument and control system, and two of these are addressed in this work. The first is to quantify the fault coverage of each fault-tolerant technique implemented in the system, and the second is to exclude the duplicated effect of fault-tolerant techniques implemented simultaneously at each level of the system's hierarchy, as a fault occurring in a system might be detected by one or more fault-tolerant techniques. For this work, a fault injection experiment was used to obtain the exact relations between faults and multiple barriers of faulttolerant techniques. This experiment was applied to a bistable processor of a reactor protection system.

Generalization of the Testing-Domain Dependent NHPP SRGM and Its Application

  • Park, J.Y.;Hwang, Y.S.;Fujiwara, T.
    • International Journal of Reliability and Applications
    • /
    • 제8권1호
    • /
    • pp.53-66
    • /
    • 2007
  • This paper proposes a new non-homogeneous Poisson process software reliability growth model based on the coverage information. The new model incorporates the coverage information in the fault detection process by assuming that only the faults in the covered constructs are detectable. Since the coverage growth behavior depends on the testing strategy, the fault detection process is first modeled for the general testing strategy and then realized for the uniform testing. Finally the model for the uniform testing is empirically evaluated by applying it to real data sets.

  • PDF

Evaluation of effectiveness of fault-tolerant techniques in a digital instrumentation and control system with a fault injection experiment

  • Kim, Man Cheol;Seo, Jeongil;Jung, Wondea;Choi, Jong Gyun;Kang, Hyun Gook;Lee, Seung Jun
    • Nuclear Engineering and Technology
    • /
    • 제51권3호
    • /
    • pp.692-701
    • /
    • 2019
  • Recently, instrumentation and control (I&C) systems in nuclear power plants have undergone digitalization. Owing to the unique characteristics of digital I&C systems, the reliability analysis of digital systems has become an important element of probabilistic safety assessment (PSA). In a reliability analysis of digital systems, fault-tolerant techniques and their effectiveness must be considered. A fault injection experiment was performed on a safety-critical digital I&C system developed for nuclear power plants to evaluate the effectiveness of fault-tolerant techniques implemented in the target system. A software-implemented fault injection in which faults were injected into the memory area was used based on the assumption that all faults in the target system will be reflected in the faults in the memory. To reduce the number of required fault injection experiments, the memory assigned to the target software was analyzed. In addition, to observe the effect of the fault detection coverage of fault-tolerant techniques, a PSA model was developed. The analysis of the experimental result also can be used to identify weak points of fault-tolerant techniques for capability improvement of fault-tolerant techniques

시간 상이점을 이용한 자체 검진 비교기의 설계에 관한 연구 (A Study on The Design of The Self-Checking Comparator Using Time Diversity)

  • 신석균;양성현;이기서
    • 한국철도학회:학술대회논문집
    • /
    • 한국철도학회 1998년도 추계학술대회 논문집
    • /
    • pp.270-279
    • /
    • 1998
  • This paper presents the design of self-checking comparator using the time diversity and the application to 8 bit CPU for the implementation of fault tolerant computer system. this self-checking comparator was designed with the different time Points in which temporary faults were raised by electrical noise between duplicated functional blocks. also this self-checking comparator was simulated in the method of the fault injection using 4 bit shift register counter. we designed the duplicated Emotional block and the self-checking comparator in the single chip using the Altera EPLD and could verify the reliability and the fault detection coverage through the modeling of temporary faults ,especially intermittent faults. at the results of this research, the reliability and the fault detection coverage were implemented through the self-checking comparator using the time diversity.

  • PDF

불완전 결함 발견과 구문 반복 실행을 고려한 커버리지 기반 신뢰성 성장 모형 (A Coverage-Based Software Reliability Growth Model for Imperfect Fault Detection and Repeated Construct Execution)

  • 박중앙;박재홍;김영순
    • 정보처리학회논문지D
    • /
    • 제11D권6호
    • /
    • pp.1287-1294
    • /
    • 2004
  • 최근 소프트웨어 신뢰성을 평가하기 위해 신뢰성 측도와 커버리지 간의 관계가 연구되고 있다. 특히 커버리지에 기반한 소프트웨어 신뢰성 성장 모델에서 평균치 함수는 소프트웨어의 신뢰성 성장을 나타내는데 매우 중요한 역할을 한다. 본 논문은 커버리지에 기반한 기존 모형들의 문제점을 평균치 함수와 그 모형이 근거하는 가정을 바탕으로 파악하고, 그 문제점을 해결하기 위한 새로운 평균치 함수를 제안한다. 제안된 새로운 평균치 함수는 불완전 결함 발견과 구문의 반복 실행이 허용되는 일반적인 테스팅 환경에서 도출된 결과이다. 마지막으로 실제 데이터에 제안된 모형을 적용하여 그 성능을 평가한다.

Frameworks for NHPP Software Reliability Growth Models

  • Park, J.Y.;Park, J.H.;Fujiwara, T.
    • International Journal of Reliability and Applications
    • /
    • 제7권2호
    • /
    • pp.155-166
    • /
    • 2006
  • Many software reliability growth models (SRGMs) based on nonhomogeneous Poisson process (NHPP) have been developed and applied in practice. NHPP SRGMs are characterized by their mean value functions. Mean value functions are usually derived from differential equations representing the fault detection/removal process during testing. In this paper such differential equations are regarded as frameworks for generating mean value functions. Currently available frameworks are theoretically discussed with respect to capability of representing the fault detection/removal process. Then two general frameworks are proposed.

  • PDF

Test-Generation-Based Fault Detection in Analog VLSI Circuits Using Neural Networks

  • Kalpana, Palanisamy;Gunavathi, Kandasamy
    • ETRI Journal
    • /
    • 제31권2호
    • /
    • pp.209-214
    • /
    • 2009
  • In this paper, we propose a novel test methodology for the detection of catastrophic and parametric faults present in analog very large scale integration circuits. An automatic test pattern generation algorithm is proposed to generate piece-wise linear (PWL) stimulus using wavelets and a genetic algorithm. The PWL stimulus generated by the test algorithm is used as a test stimulus to the circuit under test. Faults are injected to the circuit under test and the wavelet coefficients obtained from the output response of the circuit. These coefficients are used to train the neural network for fault detection. The proposed method is validated with two IEEE benchmark circuits, namely, an operational amplifier and a state variable filter. This method gives 100% fault coverage for both catastrophic and parametric faults in these circuits.

  • PDF

원전 안전필수 계측제어시스템의 주기적 자동고장검출기능에 따른 고장허용 평가모델 (The Fault Tolerant Evaluation Model due to the Periodic Automatic Fault Detection Function of the Safety-critical I&C Systems in the Nuclear Power Plants)

  • 허섭;김동훈;최종균;김창회;이동영
    • 전기학회논문지
    • /
    • 제62권7호
    • /
    • pp.994-1002
    • /
    • 2013
  • This study suggests a generalized availability and safety evaluation model to evaluate the influences to the system's fault tolerant capabilities depending on automatic fault detection function such as the automatic periodic testings. The conventional evaluation model of automatic fault detection function deals only with the self diagnostics, and supposes that the fault detection coverage of self diagnostics is always constant. But all of the fault detection methods could be degraded. For example, the periodic surveillance test has the potential human errors or test equipment errors, the self diagnostics has the potential degradation of built-in logics, and the automatic periodic testing has the potential degradation of automatic test facilities. The suggested evaluation models have incorporated the loss or erroneous behaviors of the automatic fault detection methods. The availability and the safety of each module of the safety grade platform have been evaluated as they were applied the automatic periodic test methodology and the fault tolerant evaluation models. The availability and safety of the safety grade platform were improved when applied the automatic periodic testing. Especially the fault tolerant capability of the processor module with a weak self-diagnostics and the process parameter input modules were dramatically improved compared to the conventional cases. In addition, as a result of the safety evaluation of the digital reactor protection system, the system safety of the digital parts was improved about 4 times compared to the conventional cases.

SOP Image SRAM Buffer용 다양한 데이터 패턴 병렬 테스트 회로 (Parallel Testing Circuits with Versatile Data Patterns for SOP Image SRAM Buffer)

  • 정규호;유재희
    • 대한전자공학회논문지SD
    • /
    • 제46권9호
    • /
    • pp.14-24
    • /
    • 2009
  • System on panel 프레임 버퍼를 위한 메모리 셀 어레이와 주변회로가 설계되었다. 또한, system on panel 공정의 낮은 yield를 극복하기 위해, 블럭 단위의 parallel test 방안이 제안되었다. 기존의 메모리 테스트 보다 빠르게 fault detection이 가능하며, 다양한 embedded memory나 일반 SRAM 테스트 분야에도 적용 가능하다. 또한 기존의 다양한 test vector pattern이 그대로 적용될 수 있어 fault coverage가 높고, 최근의 추세인 hierarchical bit line과 divided word line 구조에도 적용될 수 있다.