• Journal of Broadcast Engineering
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• v.16 no.4
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• pp.635-646
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• 2011

In distributed video coding, low complexity encoder can be realized by shifting encoder-side complex processes to decoder-side. However, not only motion estimation/compensation processes but also complex LDPC decoding process are imposed to the Wyner-Ziv decoder, therefore decoder-side complexity has been one important issue to improve. LDPC decoding process consists of numerous iterative decoding processes, therefore complexity increases as the number of iteration increases. This iterative LDPC decoding process accounts for more than 60% of whole WZ decoding complexity, therefore it can be said to be a main target for complexity reduction. Previously, HDA (Hard Decision Aided) method is introduced for fast LDPC decoding process. For currently received parity bits, HDA method certainly reduces the complexity of decoding process, however, LDPC decoding process is still performed even with insufficient amount of parity request which cannot lead to successful LDPC decoding. Therefore, we can further reduce complexity by avoiding the decoding process for insufficient parity bits. In this paper, therefore, a parity request estimation method is proposed using bit plane-wise correlation and temporal correlation. Joint usage of HDA method and the proposed method achieves about 72% of complexity reduction in LDPC decoding process, while rate distortion performance is degraded only by -0.0275 dB in BDPSNR.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.4
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• pp.160-172
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• 2014

Although Wyner-Ziv (WZ) video coding proves useful for applications employing encoders having restricted computing resources, the WZ decoder has a problem of excessive decoding complexity. It is mainly due to its iterative LDPC channel decoding process which repeatedly requests incremental parity data after iterative channel decoding of parity data received at each request. In order to solve the complexity problem, we divide bit planes into two groups and estimate the minimum required number of parity requests separately for the two groups of bit planes using bit plane correlation. The WZ decoder executes the iterative decoding process only after receiving parity data corresponding to the estimated minimum number of parity requests. The proposed method saves about 71% of the computing time in the LDPC decoding process.

• Journal of Communications and Networks
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• v.17 no.3
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• pp.213-220
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• 2015

In this paper, we present a reliability-based iterative proportionality-logic decoding algorithm for two classes of structured low-density parity-check (LDPC) codes. The main contributions of this paper include: 1) Syndrome messages instead of extrinsic messages are processed and exchanged between variable nodes and check nodes, which can reduce the decoding complexity; 2) a more flexible decision mechanism is developed in which the decision threshold can be self-adjusted during the iterative process. Such decision mechanism is particularly effective for decoding the majority-logic decodable codes; 3) only part of the variable nodes satisfying the pre-designed criterion are involved for the presented algorithm, which is in the proportionality-logic sense and can further reduce the computational complexity. Simulation results show that, when combined with factor correction techniques and appropriate proportionality parameter, the presented algorithm performs well and can achieve fast decoding convergence rate while maintaining relative low decoding complexity, especially for small quantized levels (3-4 bits). The presented algorithm provides a candidate for those application scenarios where the memory load and the energy consumption are extremely constrained.

• Journal of Communications and Networks
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• v.17 no.4
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• pp.339-345
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• 2015

In this paper, we present an iterative reliability-based modified majority-logic decoding algorithm for two classes of structured low-density parity-check codes. Different from the conventional modified one-step majority-logic decoding algorithms, we design a turbo-like iterative strategy to recover the performance degradation caused by the simply flipping operation. The main computational loads of the presented algorithm include only binary logic and integer operations, resulting in low decoding complexity. Furthermore, by introducing the iterative set, a very small proportion (less than 6%) of variable nodes are involved in the reliability updating process, which can further reduce the computational complexity. Simulation results show that, combined with the factor correction technique and a well-designed non-uniform quantization scheme, the presented algorithm can achieve a significant performance improvement and a fast decoding speed, even with very small quantization levels (3-4 bits resolution). The presented algorithm provides a candidate for trade-offs between performance and complexity.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.6C
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• pp.571-577
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• 2009

This paper proposes some new improved versions of node-wise VCRBP algorithm for low-density parity-check (LDPC) codes, called forced-convergence node-wise VCRBP algorithm and sign based node-wise VCRBP, both of which significantly reduce the decoding complexity and latency, with only negligible deterioration in error correcting performance.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.10C
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• pp.942-949
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• 2007

In this paper, we propose a new rate-control scheme, called splining, to construct low-rate codes from high-rate codes by splitting rows of the parity-check matrices of LDPC codes, which can construct rate-compatible LDPC codes having good initial transmission performance. Good low-rate codes can be constructed by making the number of distinct check node degrees as small as possible after splitting. The proposed scheme achieves good cycle property, low decoding complexity, and fast convergence speed, especially compared to the puncturing. Especially, rate-compatible repeat accumulate-type LDPC (RA-Type LDPC) code is constructed using splitting, which covers the code rates from 1/3 to 4/5. Through simulation it is shown that this code outperforms other rate-compatible RA-Type LDPC codes for all rates and can be decoded conveniently and efficiently.

• ETRI Journal
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• v.30 no.6
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• pp.807-817
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• 2008

We present a low-density parity-check (LDPC)-based, threaded layered space-time-frequency system with emphasis on the iterative receiver design. First, the unbiased minimum mean-squared-error iterative-tree-search (U-MMSE-ITS) detector, which is known to be one of the most efficient multi-input multi-output (MIMO) detectors available, is improved by augmentation of the partial-length paths and by the addition of one-bit complement sequences. Compared with the U-MMSE-ITS detector, the improved detector provides better detection performance with lower complexity. Furthermore, the improved detector is robust to arbitrary MIMO channels and to any antenna configurations. Second, based on the structure of the iterative receiver, we present a low-complexity belief-propagation (BP) decoding algorithm for LDPC-codes. This BP decoder not only has low computing complexity but also converges very fast (5 iterations is sufficient). With the efficient receiver employing the improved detector and the low-complexity BP decoder, the proposed system is a promising solution to high-data-rate transmission over selective-fading channels.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.11C
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• pp.901-906
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• 2010

Low density parity check (LDPC) code, first introduced by Gallager and re-discovered by MacKay et al, has attracted researcher's interest mainly due to their performance and low decoding complexity. It was remarkable that the performance is very close to Shannon capacity limit under the assumption of having long codeword length and iterative decoder. However, comparing to turbo codes widely used in the current mobile communication, the encoding complexity of LDPC codes has been regarded as the drawback. This paper proposes a solution for DVB-S2 LDPC encoder to reduce the encoder latency. We use the fast IRA encoder that use the transformation of the parity check matrix into block-wise form and the partial parallel process to reduce the number of system clocks for the IRA code encoding. We compare the proposed encoder with the current DVB-S2 encoder to show that the performance of proposal is better than that of the current DVB-S2 encoder.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.47 no.6
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• pp.66-74
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• 2010

Recently distributed video coding (DVC) is spotlighted for the environment which has restriction in computing resource at encoder. Wyner-Ziv (WZ) coding is a representative scheme of DVC. The WZ encoder independently encodes key frame and WZ frame respectively by conventional intra coding and channel code. WZ decoder generates side information from reconstructed two key frames (t-1, t+1) based on temporal correlation. The side information is regarded as a noisy version of original WZ frame. Virtual channel noise can be removed by channel decoding process. So the performance of WZ coding greatly depends on the performance of channel code. Among existing channel codes, Turbo code and LDPC code have the most powerful error correction capability. These channel codes use stochastically iterative decoding process. However the iterative decoding process is quite time-consuming, so complexity of WZ decoder is considerably increased. Analysis of the complexity of LPDCA with real video data shows that the portion of complexity of LDPCA decoding is higher than 60% in total WZ decoding complexity. Using the HDA (Hard Decision Aided) method proposed in channel code area, channel decoding complexity can be much reduced. But considerable RD performance loss is possible according to different thresholds and its proper value is different for each sequence. In this paper, we propose an adaptive HDA method which sets up a proper threshold according to sequence. The proposed method shows about 62% and 32% of time saving, respectively in LDPCA and WZ decoding process, while RD performance is not that decreased.