• Proceedings of the IEEK Conference
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• 2007.07a
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• pp.263-264
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• 2007

In this paper, an efficient SAD(Sum of Absolute Differences) processor structure for motion estimation of 0.264 is proposed. SAD processors are commonly used both in full search methods for motion estimation or in fast search methods for motion estimation. Proposed structure consists of SAD calculator block, combinator block, and minimum value calculator block. Especially, proposed structure is simplified by using Distributed Arithmetic for addition operation. The Verilog-HDL(Hard Description Language) coding and FPGA implementation results for the proposed structure show 39% and 32% gate count reduction comparison with those of the conventional structure, respectively. Due to its efficient processing scheme, the proposed SAD processor structure can be widely used in size dominant H.264 chip.

• Proceedings of the Korean Information Science Society Conference
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• 2001.04a
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• pp.508-510
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• 2001

동영상을 효율적으로 압축하기 위한 움직임백터 예측에 관한 많은 연구가 진행되어 왔다. 가장 일반적인 FBMA(Full search-based Block Matching Algorithm)는 화질은 좋지만 계량이 많기 때문에 실시간 인코딩을 요구하는 시스템에서 사용하는데 문제가 있다. 좋은 화질을 유지하면서 인코딩 속도를 해결하기 위한 많은 알고리즘들이 제안되어 왔지만 ASIC이나 소형 시스템에서 사용할 수 있는 방법이 계속 요구되고 있다. 본 논문에서는 계산량을 더욱 줄여 속도향상을 위한 방법인 TSWS(Two-Step search With Subsampling method) 제안하였다. TSWS는 블록정합알고리즘에 기반을 두고 있으며, 서브샘플링한 값으로 움직임 벡터를 찾는다. TSWS를 사용하였을 때 기존 방법들이 제공하는 주관적 화질이나 PSNR을 어느 정도 유지하면서도 속도를 20-30% 정도 개선시킬 수 있다.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.30B no.1
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• pp.45-55
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• 1993

In this paper, a two-stage block matching algorithm (BMA), which can reduce greatly the computational complexity of the conventional BMAs, is proposed, in which the onedimensional distortion measure based on the integral projection is introduced to determine the candidate motion vectors and then among them a final motion vector is detected based on the conventional two-dimensional distortion measure. Due to the one-dimensional calculation of a distortion measure, the proposed algorithm can reduce the computational complexity of the conventional BMA (full search method with a 16$\times$16 block) by a factor of 4, with its performance comparable to those of the conventional ones. Simulation results based on the original and noisy image sequences are shown. Also the simulation of the proposed method combined with the MPEG (Moving Picture Experts Group) SM3 (Simulation Model Three) is presented. Computer simulation shows that the proposed algorithm is fast with its performance comparable to those of the conventional ones.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2009.01a
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• pp.278-281
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• 2009

In this paper, we propose a fast partial distortion algorithm using normalized dithering matching scan to get uniform distribution of partial distortion which can reduce only unnecessary computation significantly. Our algorithm is based on normalized dithering order matching scan and calibration of threshold error using LOG value for each sub-block continuously for efficient elimination of unlike candidate blocks while keeping the same prediction quality compared with the full search algorithm. Our algorithm reduces about 60% of computations for block matching error compared with conventional PDE (partial distortion elimination) algorithm without any prediction quality, and our algorithm will be useful to real-time video coding applications using MPEG-4 AVC or MPEG-2.

• The Journal of the Acoustical Society of Korea
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• v.16 no.2
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• pp.95-100
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• 1997

In this paper, we present a new fast VQ encoding algorithm. The proposed algorithm facilitates two characteristics of a vector, i.e., mean and variance to reject many unlikely codewords and save a lot of computation time. Since the proposed algorithm, which is based upon geometric considerations, rejects those codewords that are impossible to be the closest codeword, it provides the same results as a conventional exhaustive(or full) search algorithm. The simulation results confirm the effectiveness of the proposed algorithm.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.26 no.11A
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• pp.1889-1896
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• 2001

This paper proposes the hierachically regularized motion estimation technique for the efficient and accurate motion estimation. To use hierachical technique increases the reliability of motion vectors. And the regularization of neighbor vectors decreases bit rate of motion vectors. Also, using fast motion estimation algorithm with a few candidate vectors, the processing time added by regularization can be decreased. In the result of the experiment, the fast motion estimation with hierachical regularization technique achieves less computations and decreases estimation and distribution of false vectors.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.2 no.3
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• pp.39-52
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• 2009

Scale Invariant Feature Transform (SIFT) is an effective algorithm in object recognition, panorama stitching, and image matching, however, due to its complexity, real time processing is difficult to achieve with software approaches. This paper proposes using a reconfigurable hardware processor with integer half kernel. The integer half kernel Gaussian reduces the Gaussian pyramid complexity in about half [] and the reconfigurable processor carries out a parallel implementation of a full search Fast SIFT algorithm. We use a low memory, fine grain single instruction stream multiple data stream (SIMD) pixel processor that is currently being developed. This implementation fully exposes the available parallelism of the SIFT algorithm process and exploits the processing and I/O capabilities of the processor which results in a system that can perform real time image and video compression. We apply this novel implementation to images and measure the effectiveness. Experimental simulation results indicate that the proposed implementation is capable of real time applications.

• Journal of Broadcast Engineering
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• v.16 no.4
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• pp.647-656
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• 2011

Motion estimation using one-bit transform and two-bit transform reduces the complexity for computation of matching error; however, the peak signal-to-noise ratio (PSNR) is degraded. Modified 1BT (M1BT) and modified 2BT (M2BT) have been proposed to compensate degraded PSNR by adding conditional local search. However, these algorithms require many additional search points in fast moving sequences with a block size of $16{\times}16$. This paper provides more efficient search method by preparing candidate blocks using the number of non-matching points (NNMP) than the conditional local search. With this NNMP-based search, we can easily obtain candidate blocks with small NNMP and efficiently search final motion vector. Experimental results show that the proposed algorithm not only reduces computational complexity, but also improves PSNR on average compared with conventional search algorithm used in M1BT, M2BT and AM2BT.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.3
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• pp.594-600
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• 2017

This paper proposes a global search based motion estimation algorithm for high performance HEVC encoder and its hardware architecture. To eliminate temporal redundancy, motion estimation in HEVC inter-view prediction uses global search and fast search algorithm to search for a predicted block having a high correlation with the current PU in an interpolated reference picture. The global search method predicts the motion of all candidate blocks in a given search area, thus ensuring optimal results, but has a disadvantage of large computation time. Therefore we propose a new algorithm that reduces computational complexity by reusing SAD operation in global search to reduce computation time of inter prediction. As a result of applying the proposed algorithm to standard software HM16.12, the computation time was reduced by 61%, BDBitrate by 11.81%, and BDPSNR by about 0.5% compared with the existing search algorithm. As a result of hardware design, the maximum operating frequency is 255 MHz and the total number of gates is 65.1K.

• Journal of Broadcast Engineering
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• v.5 no.2
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• pp.247-259
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• 2000

This paper introduces a new technique that reduces the search times and Improves the accuracy of motion estimation using high temporal and spatial correlation of motion vector. Instead of using the fixed first search Point of previously proposed search algorithms, the proposed method finds more accurate first search point as to compensating searching area using high temporal and spatial correlation of motion vector. Therefore, the main idea of proposed method is to find first search point to improve the performance of motion estimation and reduce the search times. The proposed method utilizes the direction of the same coordinate block of the previous frame compared with a block of the current frame to use temporal correlation and the direction of the adjacent blocks of the current frame to use spatial correlation. Based on these directions, we compute the first search point. We search the motion vector in the middle of computed first search point with two fixed search patterns. Using that idea, an efficient adaptive predicted direction search algorithm (APDSA) for block matching motion estimation is proposed. In the experimental results show that the PSNR values are improved up to the 3.6dB as depend on the Image sequences and advanced about 1.7dB on an average. The results of the comparison show that the performance of the proposed APDSA algorithm is better than those of other fast search algorithms whether the image sequence contains fast or slow motion, and is similar to the performance of the FS (Full Search) algorithm. Simulation results also show that the performance of the APDSA scheme gives better subjective picture quality than the other fast search algorithms and is closer to that of the FS algorithm.