• Journal of Institute of Control, Robotics and Systems
• /
• v.19 no.7
• /
• pp.646-652
• /
• 2013

EU's Galileo project is a market-based GNSS (Global Navigation Satellite System) that is under development. It is expected that Galileo will provide the positioning services based on new technologies in 2020s. Because Galileo E1 signal for OS (Open Service) shares the same center frequency with GPS L1 C/A signal, CBOC (Composite Binary Offset Carrier) modulation scheme is used in the E1 signal to guarantee interoperability between two systems. With E1 signal consisting of a data channel and a pilot channel at the same frequency band, there exist several options in designing signal acquisition for Assisted-Galileo receivers. Furthermore, compared to SNR worksheet of Assisted-GPS, some factors should be examined in Assisted-Galileo due to different correlation profile and code length of E1 signal. This paper presents SNR worksheets of Galileo E1 signals in E1-B and E1-C channel. Three implementation losses that are quite different from GPS are mainly analyzed in establishing SNR worksheets. In the worksheet, hybrid long integration of 1.5s is considered to acquire weak signal less than -150dBm. Simulation results show that the final SNR of E1-B signal with -150dBm is 19.4dB and that of E1-C signal is 25.2dB. Comparison of relative computation shows that E1-B channel is more profitable to acquire the strongest signal in weak signal environment. With information from the first satellite signal acquisition, fast acquisition of the weak signal around -155dBm can be performed with E1-C signal in the subsequent satellites.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.47 no.12
• /
• pp.48-54
• /
• 2010

This paper presents a high-performance architecture of integer-pel motion estimation circuit for H.264 video CODEC. Full search algorithm guarantees the best results by examining all candidate blocks. However, the full search algorithm requires a huge amount of computation and data. Many fast search algorithms have been proposed to reduce the computational efforts. The disadvantage of these algorithms is that data access from or to memory is very irregular and data reuse is difficult. In this paper, we propose an efficient integer-pixel motion estimation algorithm and the circuit architecture to improve the processing speed and reduce the external memory bandwidth. The proposed circuit supports seven kinds of variable block sizes and generates 41 motion vectors. We described the proposed high-performance motion estimation circuit at R1L and verified its operation on FPGA board. The circuit synthesized by using l30nm CMOS standard cell library processes 139.8 1080HD ($1,920{\times}1,088$) image frames per second and supports up to H.264 level 5.1.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.21 no.4
• /
• pp.698-707
• /
• 2017

This paper deals with predictive control methods of mobile robots for reference trajectory tracking control. Predictive control methods using predictive model are known as effective schemes that minimize the future errors between the reference trajectories and system states; however, the amount of real-time computation for the predictive control are huge so that their applications were limited to slow dynamic systems such as chemical processing plants. Lately with high computing power due to advanced computer technologies, the predictive control methods have been applied to fast systems such as mobile robots. These predictive controllers have some control parameters related to control performance. But these parameters have not been optimized. In this paper we employed the genetic algorithm to optimize the control parameters of the predictive controller for mobile robots. The improved performances of the proposed control method are demonstrated by the computer simulation studies.

• Journal of Communications and Networks
• /
• v.11 no.6
• /
• pp.574-588
• /
• 2009

Although much research has been conducted in the area of authentication in wireless networks, vehicular ad-hoc networks (VANETs) pose unique challenges, such as real-time constraints, processing limitations, memory constraints, frequently changing senders, requirements for interoperability with existing standards, extensibility and flexibility for future requirements, etc. No currently proposed technique addresses all of the requirements for message and entity authentication in VANETs. After analyzing the requirements for viable VANET message authentication, we propose a modified version of TESLA, TESLA++, which provides the same computationally efficient broadcast authentication as TESLA with reduced memory requirements. To address the range of needs within VANETs we propose a new hybrid authentication mechanism, VANET authentication using signatures and TESLA++ (VAST), that combines the advantages of ECDSA signatures and TESLA++. Elliptic curve digital signature algorithm (ECDSA) signatures provide fast authentication and non-repudiation, but are computationally expensive. TESLA++ prevents memory and computation-based denial of service attacks. We analyze the security of our mechanism and simulate VAST in realistic highway conditions under varying network and vehicular traffic scenarios. Simulation results show that VAST outperforms either signatures or TESLA on its own. Even under heavy loads VAST is able to authenticate 100% of the received messages within 107ms. VANETs use certificates to achieve entity authentication (i.e., validate senders). To reduce certificate bandwidth usage, we use Hu et al.'s strategy of broadcasting certificates at fixed intervals, independent of the arrival of new entities. We propose a new certificate verification strategy that prevents denial of service attacks while requiring zero additional sender overhead. Our analysis shows that these solutions introduce a small delay, but still allow drivers in a worst case scenario over 3 seconds to respond to a dangerous situation.

• The Transactions of the Korean Institute of Electrical Engineers A
• /
• v.53 no.10
• /
• pp.556-564
• /
• 2004

This paper presents an application of parallel Genetic Algorithm-Tabu Search(GA-TS) algorithm to search an optimal solution of a reconfiguration in distribution system. The aim of the reconfiguration of distribution systems is to determine switch position to be opened for loss minimization in the radial distribution systems, which is a discrete optimization problem. This problem has many constraints and very difficult to solve the optimal switch position because it has many local minima. This paper develops parallel GA-TS algorithm for reconfiguration of distribution systems. In parallel GA-TS, GA operators are executed for each processor. To prevent solution of low fitness from appearing in the next generation, strings below the average fitness are saved in the tabu list. If best fitness of the GA is not changed for several generations, TS operators are executed for the upper 10% of the population to enhance the local searching capabilities. With migration operation, best string of each node is transferred to the neighboring node aster predetermined iterations are executed. For parallel computing, we developed a PC-cluster system consisting of 8 PCs. Each PC employs the 2 GHz Pentium Ⅳ CPU and is connected with others through ethernet switch based fast ethernet. To show the usefulness of the proposed method, developed algorithm has been tested and compared on a distribution systems in the reference paper. From the simulation results, we can find that the proposed algorithm is efficient and robust for the reconfiguration of distribution system in terms of the solution qualify. speedup. efficiency and computation time.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.34 no.8A
• /
• pp.583-591
• /
• 2009

OFDM(orthogonal frequency division multiplexing) signal with high PAPR(peak to average power ratio) produces the nonlinear distortion and/or decreases down the power efficiency of HPA(high power amplifier). So, the IMD(inter-modulation distortion) reduction method was proposed to reduce the nonlinear distortion, which shows better BER(bit error rate) performance than the PAPR reduction methods. However, IMD reduction method has inherent problem which system complexity and processing time increases because the FFT(fast Fourier transform) processor is added in transmitter and decision criterion of IMD reduction method is computed in frequency domain,. In this paper, therefore, we propose a new IMD reduction method to reduce the computational complexity and structure of IMD computation. And we apply this proposed method into OFDM system using PTS(partial transmit sequence) scheme and compare the computational complexity between conventional and proposed IMD reduction method. This method can reduce the system size and computational complexity. Also, the proposed has almost same BER performance with the conventional IMD reduction method.

• Journal of the Institute of Electronics Engineers of Korea TE
• /
• v.39 no.4
• /
• pp.395-402
• /
• 2002

In the conventional public switched telephone network(PSTN), there are various types of modulation that can be used in ADSL to offer fast data communication, two of which are CAP(Carrierless Amplitude Phase) and DMT(Discrete MultiTone). As we consider the current situation, DMT is getting more predominant in the market than CAP. One of the reasons is that it gives high performance in spite of its high complexity Since DMT divides the full range of bandwidth into 256 sub-channels, it can be highly adaptive in the circumstances, where the problems of attenuation and noise caused by the propagation distance are very crucial. In this paper, a new bit loading algorithm for DMT modulation is proposed. The proposed algorithm can be efficiently implemented in a way that it requires less computation than the conventional modulation techniques. In contrast to the conventional algorithms which perform sorting processing, the proposed algorithm uses look-up tables to reduce the repetition of calculation. Consequently, it is shown that less processing time and lower complexity can be achieved.

• Journal of Broadcast Engineering
• /
• v.19 no.3
• /
• pp.316-328
• /
• 2014

In this paper, we parallelize the popular feature detection algorithms, i.e. SIFT and SURF, and its application to fast panoramic image generation on the latest embedded GPU. Parallelized algorithms are implemented using recently developed OpenCL as the embedded GPGPU software platform. We compare the implementation efficiency and speed performance of conventional OpenGL Shading Language and OpenCL. Experimental result shows that implementation on OpenCL has comparable performance with GLSL. Compared with the performance on the embedded CPU in the same application processor, the embedded GPU runs 3~4 times faster. As an example of using feature extraction, panorama image synthesis is performed on embedded GPU by applying image matching using detected features.

• Proceedings of the KSME Conference
• /
• 2000.11b
• /
• pp.192-198
• /
• 2000

Three dimensional thermal cycle analysis of the plunger is carried out in repeated forming process of the TV glass, which is continued work of two dimensional analysis where an efficient method has been proposed. The plunger undergoes temperature fluctuation during a cycle due to the repeated contact and separation from the glass, which attains a cyclic steady state having same temperature history at every cycle. Straightforward analysis of this problem brings about more than 90 cycles to get reasonable solution. An exponential function fitting method is proposed, which finds exponential function to best approximate temperature values of 3 consecutive cycles, and new cycle is restarted with the fitted value at infinite time. Number of cases are analyzed using the proposed method and compared to the result of straightforward repetition, from which one finds that the method always reaches nearly convergent solution within $9{\sim}12$ cycles, but turns around afterwards without further convergence. Two step use is found most efficient, in which the exponential fitting is carried out fer the first 12 cycles, followed by simple repetition, which shows fast convergence expending only 6 additional cycles to get the accuracy within 2 error. This reduces the computation cycle remarkably from 90 to 18, which is 80% reduction. From the parametric studies, one reveals that the overall thermal behavior of the plunger in terms of cooling parameters and time is similar to that of 2 dimensional analysis.

• Transactions of the Korean Society of Mechanical Engineers A
• /
• v.36 no.7
• /
• pp.777-787
• /
• 2012

The transient analysis for the output voltage of a piezoresistive microaccelerometer takes a relatively high computation time because at least two iterations are required to calculate the piezoresistive-structural coupled response at each time step. In this study, the high computational cost for calculating the transient output voltage is considerably reduced by an approach integrating the mode superposition method and the least square method. In the approach, data on static displacement and output voltage calculated by piezoresistive-structural coupled simulation for three acceleration inputs are used to develop a quadratic regression model, relating the output voltage to the displacement at a certain observation point. The transient output voltage is then approximated by a regression model using the displacement response cheaply calculated by the mode superposition method. A high-impact microaccelerometer subject to several types of acceleration inputs such as 100,000 G shock, sine, step, and square pulses are adopted as a numerical example to represent the efficiency and accuracy of the suggested approach.