• Title/Summary/Keyword: Fast Computation

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Improvement in Computation of Δ V10 Flicker Severity Index Using Intelligent Methods

  • Moallem, Payman;Zargari, Abolfazl;Kiyoumarsi, Arash
    • Journal of Power Electronics
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    • v.11 no.2
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    • pp.228-236
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    • 2011
  • The ${\Delta}\;V_{10}$ or 10-Hz flicker index, as a common method of measurement of voltage flicker severity in power systems, requires a high computational cost and a large amount of memory. In this paper, for measuring the ${\Delta}\;V_{10}$ index, a new method based on the Adaline (adaptive linear neuron) system, the FFT (fast Fourier transform), and the PSO (particle swarm optimization) algorithm is proposed. In this method, for reducing the sampling frequency, calculations are carried out on the envelope of a power system voltage that contains a flicker component. Extracting the envelope of the voltage is implemented by the Adaline system. In addition, in order to increase the accuracy in computing the flicker components, the PSO algorithm is used for reducing the spectral leakage error in the FFT calculations. Therefore, the proposed method has a lower computational cost in FFT computation due to the use of a smaller sampling window. It also requires less memory since it uses the envelope of the power system voltage. Moreover, it shows more accuracy because the PSO algorithm is used in the determination of the flicker frequency and the corresponding amplitude. The sensitivity of the proposed method with respect to the main frequency drift is very low. The proposed algorithm is evaluated by simulations. The validity of the simulations is proven by the implementation of the algorithm with an ARM microcontroller-based digital system. Finally, its function is evaluated with real-time measurements.

A Study On Recommend System Using Co-occurrence Matrix and Hadoop Distribution Processing (동시발생 행렬과 하둡 분산처리를 이용한 추천시스템에 관한 연구)

  • Kim, Chang-Bok;Chung, Jae-Pil
    • Journal of Advanced Navigation Technology
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    • v.18 no.5
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    • pp.468-475
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    • 2014
  • The recommend system is getting more difficult real time recommend by lager preference data set, computing power and recommend algorithm. For this reason, recommend system is proceeding actively one's studies toward distribute processing method of large preference data set. This paper studied distribute processing method of large preference data set using hadoop distribute processing platform and mahout machine learning library. The recommend algorithm is used Co-occurrence Matrix similar to item Collaborative Filtering. The Co-occurrence Matrix can do distribute processing by many node of hadoop cluster, and it needs many computation scale but can reduce computation scale by distribute processing. This paper has simplified distribute processing of co-occurrence matrix by changes over from four stage to three stage. As a result, this paper can reduce mapreduce job and can generate recommend file. And it has a fast processing speed, and reduce map output data.

An Efficient Encryption Scheme Combining PRNG and Permutation for Mobile Multimedia Data (모바일 멀티미디어 데이타를 위한, 의사난수생성기와 순열 기법을 결합한 효율적인 암호화 기법)

  • Han, Jung-Kyu;Cho, Yoo-Kun
    • Journal of KIISE:Computer Systems and Theory
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    • v.34 no.11
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    • pp.581-588
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    • 2007
  • In Digital Right Management, symmetric cipher is used for content encryption to reduce encryption cost, AES, advanced encryption standard is usually used to multimedia encryption under desktop environment because of its reasonable security level and computation cost. But mobile handheld device often uses slow speed processor and operates under battery-powered environment. Therefore it requires low computation cost and low energy consumption. This paper proposes new stream cipher scheme which combines pseudo random number generator(PRNG) and dynamically generated permutations. Proposed scheme activates PRNG and generates original key streams. Then it generates extended key streams by applying permutation to original sequence. These extended key streams are XORed with plaintext and generate ciphertext. Proposed scheme reduces the usage of PRNG. Therefore this scheme is fast and consumes less energy in comparison with normal stream cipher. Especially, this scheme shows great speed up (almost 2 times) than normal stream cipher scheme in random access.

Topology Correction for Flattening of Brain Cortex

  • Kwon Min Jeong;Park Hyun Wook
    • Journal of Biomedical Engineering Research
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    • v.26 no.2
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    • pp.73-86
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    • 2005
  • We need to flatten the brain cortex to smooth surface, sphere, or 2D plane in order to view the buried sulci. The rendered 3D surface of the segmented white matter and gray matter does not have the topology of a sphere due to the partial volume effect and segmentation error. A surface without correct topology may lead to incorrect interpretation of local structural relationships and prevent cortical unfolding. Although some algorithms try to correct topology, they require heavy computation and fail to follow the deep and narrow sulci. This paper proposes a method that corrects topology of the rendered surface fast, accurately, and automatically. The proposed method removes fractions beside the main surface, fills cavities in the inside of the main surface, and removes handles in the surface. The proposed method to remove handles has three-step approach. Step 1 performs smoothing operation on the rendered surface. In Step 2, vertices of sphere are gradually deformed to the smoothed surfaces and finally to the boundary of the segmented white matter and gray matter. The Step 2 uses multi-resolutional approach to prevent the deep sulci from geometrical intersection. In Step 3, 3D binary image is constructed from the deformed sphere of Step 2 and 3D surface is regenerated from the 3D binary image to remove intersection that may happen. The experimental results show that the topology is corrected while principle sulci and gyri are preserved and the computation amount is acceptable.

A Fast Sub-pixel Motion Estimation Method for H.264 Video Compression (H.264 동영상 압축을 위한 부 화소 단위에서의 고속 움직임 추정 방법)

  • Lee, Yun-Hwa;Choi, Myung-Hoon;Shin, Hyun-Chul
    • Journal of KIISE:Software and Applications
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    • v.33 no.4
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    • pp.411-417
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    • 2006
  • Motion Estimation (ME) is an important part of video coding process and it takes the largest amount of computation in video compression. Half-pixel and quarter-pixel motion estimation can improve the video compression rate at the cost of higher computational complexity In this paper, we suggest a new efficient low-complexity algorithm for half-pixel and quarter pixel motion estimation. It is based on the experimental results that the sum of absolute differences(SAD) shows parabolic shape and thus can be approximated by using interpolation techniques. The sub-pixel motion vector is searched from the minimum SAD integer-pixel motion vector. The sub-pixel search direction is determined toward the neighboring pixel with the lowest SAD among 8 neighbors. Experimental results show that more than 20% reduction in computation time can be achieved without affecting the quality of video.

Area Efficient Bit-serial Squarer/Multiplier and AB$^2$-Multiplier (공간 효율적인 비트-시리얼 제곱/곱셈기 및 AB$^2$-곱셈기)

  • 이원호;유기영
    • Journal of KIISE:Computer Systems and Theory
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    • v.31 no.1_2
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    • pp.1-9
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    • 2004
  • The important arithmetic operations over finite fields include exponentiation, division, and inversion. An exponentiation operation can be implemented using a series of squaring and multiplication operations using a binary method, while division and inversion can be performed by the iterative application of an AB$^2$ operation. Hence, it is important to develop a fast algorithm and efficient hardware for this operations. In this paper presents new bit-serial architectures for the simultaneous computation of multiplication and squaring operations, and the computation of an $AB^2$ operation over $GF(2^m)$ generated by an irreducible AOP of degree m. The proposed architectures offer a significant improvement in reducing the hardware complexity compared with previous architectures, and can also be used as a kernel circuit for exponentiation, division, and inversion architectures. Furthermore, since the Proposed architectures include regularity and modularity, they can be easily designed on VLSI hardware and used in IC cards.

Nonlinear System State Estimating Using Unscented Particle Filters (언센티드 파티클 필터를 이용한 비선형 시스템 상태 추정)

  • Kwon, Oh-Shin
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.17 no.6
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    • pp.1273-1280
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    • 2013
  • The UKF algorithm for tracking moving objects has fast convergence speed and good tracking performance without the derivative computation. However, this algorithm has serious drawbacks which limit its use in conditions such as Gaussian noise distribution. Meanwhile, the particle filter(PF) is a state estimation method applied to nonlinear and non-Gaussian systems without these limitations. But this method also has some disadvantages such as computation increase as the number of particles rises. In this paper, we propose the Unscented Particle Filter (UPF) algorithm which combines Unscented Kalman Filter (UKF) and Particle Filter (PF) in order to overcome these drawbacks.The performance of the UPF algorithm was tested to compare with Particle Filter using a 2-DOF (Degree of Freedom) Pendulum System. The results show that the proposed algorithm is more suitable to the nonlinear and non-Gaussian state estimation compared with PF.

Low Energy Motion Estimation Architecture using Energy Management Algorithm (에너지 관리 알고리즘을 이용한 저전력 움직임 추정기 구조)

  • Kim Eung-sup;Lee Chanho
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.8C
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    • pp.793-800
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    • 2005
  • Computation of multimedia data increases in portable devices with the advances of the mobile and personal communication services. The energy management of such devices is very important for the battery-powered operation hours. The motion estimation in a video encoder requires huge amount of computation, and hence, consumes the largest portion of the energy consumption. In this paper, we propose a novel architecture that a low energy management scheme can be applied with several fast-search algorithms. The energy-constrained Vdd hopping (ECVH) technique reduces power consumption of the motion estimation by adaptively changing the search algorithm, the operating frequency, and the supply voltage using the remaining slack time within given power-budget. We show that the ECVH can be applied to the architecture, and that the power consumption can be efficiently reduced.

Fast Object Detection with DPM using Adaptive Bilinear Interpolated Image Pyramid (적응적 쌍선형 보간 이미지 피라미드를 이용한 DPM 기반 고속 객체 인식 기법)

  • Han, Gyu-Dong;Kim, Eung-Tae
    • Journal of Broadcast Engineering
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    • v.25 no.3
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    • pp.362-373
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    • 2020
  • Recently, as autonomous vehicles and intelligent CCTV are growing more interest, the efficient object detection is essential technique. The DPM(Deformable Part Models) which is basis of this paper have used a typical object system that represents highly variable objects using mixtures of deformable part for object. Although it shows high detection performance by capturing part shape and configuration of object model, but it is limited to use in real application due to the complicated algorithm. In this paper, instead of image feature pyramid that takes up a large amount of computation in one part of the detector, we propose a method to reduce the computation speed by reconstructing a new image feature pyramid that uses adaptive bilinear interpolation of feature maps obtained on a specific image scale. As a result, the detection performance for object was lowered a little by 2.82%, however, the proposed detection method improved the speed performance by 10% in comparison with original DPM.

An Advanced Contrast Enhancement Using Partially Overlapped Sub-Block Histogram Equalization (서브블록 히스토그램 등화기법을 이용한 개선된 콘트래스트 강화 알고리즘)

  • Kim, Joung-Youn;Kim, Lee-Sup;Hwang, Seung-Ho
    • Journal of the Korean Institute of Telematics and Electronics S
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    • v.36S no.12
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    • pp.58-66
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    • 1999
  • In this paper, an advanced histogram equalization algorithm for contrast enhancement is presented. Histogram equalization is the most popular algorithm. Global histogram equalization is simple and fast, but its contrast enhancement power is relatively low. Local histogram equalization, on the other hand, can enhance overall contrast more effectively, but the complexity of computation required is very high. In this paper, a low pass filter type mask is used to get a sub-block histogram equalization function to more simply produce the high contrast. The low pass filter type mask is realized by partially overlapped sub-block histogram equalization (POSHE). With the proposed method. the computation overhead is reduced by a factor of about one hundred compared to that of local histogram equalization while still achieving high contrast.

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