• Journal of the Korea Computer Industry Society
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• v.2 no.6
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• pp.803-816
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• 2001

This paper presents the design of strongly fail-safe interface which transform binary signals, generated by fault-tolerant system into fail-safe signals. The strongly fail-safe property is achived by means of self-checking techniques. It can be shown for this interface to be integreated while the conventional fail-safe interface require using discrete components. This paper also presents the new implementation methods by the definitions for fail-safe system.

• Proceedings of the KSME Conference
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• 2001.06b
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• pp.283-288
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• 2001

This study provides analytical evaluation of the Dual-Ann Work Module. The current hydraulic system was modeled using the HyPneu and analyzed to find the cause of the instability. The cause of the instability was determined to be primarily an interacting involving the pilot operated check valves and the counterbalance valves for fail safe mode of operation. A new design concept was developed to eliminate the potential for unstable operation while adequately meeting the need for a fail-safe feature.

• Journal of the Korea Computer Industry Society
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• v.2 no.2
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• pp.219-228
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• 2001

This paper presents the implementation of comparator which are Fail-Safe with respect to faults caused by any single physical defect likely to occur in NMOS and CMOS integrated circuit. The goal is to use it at the Fail-Safe system. First, a new fault model for PLA(Programmable Logic Array) is presented. This model reflects several physical defects in VLSI circuits. It focuses on designs based on PLA because VLSI chips are far too complex to allow detailed analysis of all the possible physical defects that can occur and of the effects on the operation of the circuit. Second, this paper show that these design, which was implemented with 2 level AND_ORor NOR-NOR circuit, are optimal in term of size. And it also present a formal proof that a comparator implemented as NOR-NOR PLA, based on these design, is self-testing with respect to most single faults in the presented fault model. Finally, it discuss the application of the self-testing comparator as a building block for implementing Fail-Safe Adder.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.5A
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• pp.389-396
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• 2005

In this paper, we design AVTMRWFSV(All Voting Triple Modular Redundancy With Fail-Safe Voter) System with a fail-safe output voter architecture and analyze RAMS(Reliability, Availability, Maintainability, Safety) as system failure rate. This system is compared with AVTMR system for RAMS(Reliability, Availability, Maintainability, Safety) with Markov modeling, and we can see that the system safety of AVTMRWFSV is more profitable than that of AVTMR. The dependability of AVTMRWFSV system is higher than that of AVTMR. Especially, safety is very profitable. So, this kind of system can be applied to embedded communication system and life critical systems - railway, airplane, ship, nuclear control system and so on.

• Proceedings of the KSR Conference
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• 2000.05a
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• pp.336-343
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• 2000

This paper proposes the failsafe control logic. which has applied to the voting on the TMR system by using FPGA The self-detection circuit is also designed for detecting a characteristic of fault at TMR system. The fault producing in the self-detection system is largely classified among an intermittent fault, a transient fault and a permanent fault. If it is happened to the permanent fault, the system can be failed. Therefore, it is designed the logic circuit which is not transferred the permanent fault to the system after shut off output. The control logic of the Fail Safe proposed in the paper is required for a circuit integrate of device to minimize the failure happened. Therefore, it makes to design FPGA with modeling of VHDL. The circuit of the Fail Safe of TMR system is able to apply to nuclear system, rail-way system, aerospace and aircraft system which is required for high reliability.

• Proceedings of the KSR Conference
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• 1999.05a
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• pp.299-306
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• 1999

The ${\mu}$-processor based-controlled system is widely used in railway signaling system. The railway signaling systems are highly required safety and reliability. It is necessary to have a fault-tolerant and fail safe concept in ${\mu}$-processor based railway signaling system. In this paper, several architectures and circuits of fault-tolerant computer system is reviewed. The basic concept of the fault-tolerant computer system will be adapted total self checking, strong fail safe, fault display circuit, logic testing circuit and system switching concepts.

• Journal of the Korean Society of Safety
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• v.6 no.1
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• pp.5-13
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• 1991

Fail-safe design of machine elements or structural members is very aim of the whole mankind. Fracture occurs generally from cracks that exist originally or produced from flaws. The most important job we have to do is to make stopping or decreasing the crack growth rate. For fail-safe design variable thickness plates have been used as structural members in practical engineering services. In this paper, optimum design of CT type plate with varlng thickness is studied with the theoritical analysis. The theoritical analysis was based on the stress concentration and nominal stress analysis. From the study, the optimum design curve was determined for use of designing of such structures using the computer analysis program of optimum design.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.50 no.4
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• pp.259-267
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• 2022

The existing method of deriving the fail-safe design requirements for the domestic developed rotary-wing aircraft system may miss the factors that cause critical system function failures, when being applied to the latest integrated avionics system. It is because the existing method analyzes the severity effect of the failures caused by a single item. To solve the issue, we present a systematic analysis procedure for deriving fail-safe design requirements of system architecture by utilizing functional hazard assessment and development assurance level analysis of SAE ARP4754A, international standard for complex system development. To demonstrate that our proposed procedure can be a solution for the aforementioned issue, we set up experimental environments that include common factors that can cause critical function failures of a system, and we conducted a cross-validation with the existing method. As a result, we showed that the proposed procedure can identify the potential critical common factors that the existing method have missed, and that the proposed procedure can derive fail-safe design requirements to control the common factors.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.49 no.1
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• pp.1-9
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• 2000

In this paper, a design method of fault-tolerance is presented for the nuclear digital control systems composed of software and hardware. As a quantitative design method measure of fault-tolerance, we used Reliability, Availability and Safety. To implement the proposed fault-tolerance, a prototype system has been devised for the digital control systems and a quantitative method of 'Markovian Model' is applied. The results provide the appropriate degree of redundancy and diversity, and fail-safe.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.39 no.7
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• pp.682-687
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• 2011

Calibration mirror mechanism has been widely used for on-board calibration with black body. The calibration mirror is deployed to reflect the radiation energy from the black body to the image sensor for calibrating the sensor system. After the calibration, the calibration mirror is stowed not to hide a main optical path. It also has a fail-safe function which can stow the mirror by just removing the input power of motor when the calibration mirror is stopped at certain position during the calibration. In the present work, the operation concept, design, torque analysis and functional test results of the calibration mirror mechanism with the aforementioned function have been introduced and investigated.