• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.11
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• pp.21-30
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• 1998

In this paper, a digital current control system using a FPGA(Field Programmable Gate Array) was implemented, and the system was applied to an induction motor widely used as an industrial driving machine. The FPGA designed by VHDL(VHSIC Hardware Description Language) consists of a PWM(Pulse Width Modulation) generation block, a PWM protection block, a speed measuring block, a watch dog timer block, an interrupt control block, a decoder logic block, a wait control block and digital input and output blocks respectively. Dedicated clock inputs on the FPGA were used for high-speed execution, and an up-down counter and a latch block were designed in parallel, in order that the triangle wave could be operated at 40 MHz clock. When triangle wave is compared with many registers respectively, gate delay occurs from excessive fan-outs. To reduce the delay, two triangle wave registers were implemented in parallel. Amplitude and frequency of the triangle wave, and dead time of PWM could be changed by software. This FPGA was synthesized by pASIC 2SpDE and Synplify-Lite synthesis tool of Quick Logic company. The final simulation for worst cases was successfully performed under a Verilog HDL simulation environment. And the FPGA programmed for an 84 pin PLCC package was applied to digital current control system for 3-phase induction motor. The digital current control system of the 3 phase induction motor was configured using the DSP(TMS320C31-40 MHz), FPGA, A/D converter and Hall CT etc., and experimental results showed the effectiveness of the digital current control system.

• IEMEK Journal of Embedded Systems and Applications
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• v.14 no.6
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• pp.339-346
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• 2019

Multi-axis servo systems are widely used in various fields such as industiral systems for improving production efficiency, robotics and complex systems where many mechanical devices and sensor systems are connected. Such a servo system requires that the servo control technique to realize the synchronization of the drive shaft in the steady state and transient conditions and to control so as to follow the target track in order to improve product precision and production efficiency. In addition, embedded type hardware is required for smooth control of the entire multi-axis system. Therefore, this paper uses hardware based on FPGA which is widely used in digital signal processing field and various control system because hardware design change is easy and parallel processing is possible. In addition, Labview based servo motor control program was studied that can control the servo motor by ensuring the performance and flexibility of the FPGA and follow the target trajectory according to various speed processing and accurate timing synchronization.

• 제어로봇시스템학회:학술대회논문집
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• 2004.08a
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• pp.1254-1258
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• 2004

This paper presents of position control of Permanent Magnet Synchronous Motor (PMSM) the implementation with Field Programmable Gate Array (FPGA) is proposed. Cascade control with inner loop as a current control and an outer loop as a position control is chosen for simplicity and fast response. FPGA is a single chip (single processing unit), which will perform the following tasks: receive and convert control signal, create a reference current signal, control current and create switch signal and act as position controller in a addition of zero form. The 10 kHz sampling frequency and 25 bit of floating point data are defined in this implementation.The experimental results show that the performance of FPGA based position control is comparable with the hardware based position control, with the advantage of control algorithm flexibility

• 제어로봇시스템학회:학술대회논문집
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• 2003.10a
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• pp.1028-1031
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• 2003

The implementation of PI controller with the FPGA is for controlling the speed of DC motor in the digital system. FPGA is assigned to 1. Outer speed control loop. The signal from the speed comparison will be in the PI controlling form transfer function of Direct Form I or PI Parallel Form. 2.Inner current control loop. The signal from the current comparison will be converted into switching function in sliding mode condition. Its output will be a controller of DC motor in the next step. The result from using FPGA will be close to the value of simulation in the analog control system. The sampling rate 40 kHz and 16 bit of 2's complement data are defined in this presentation.

• The Transactions of the Korean Institute of Power Electronics
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• v.12 no.6
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• pp.500-509
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• 2007

In this paper, we propose a novel pc-based 8-channel USB interface digital multi-controller (DMC) has capacity to be able to adjust ultrasonic motor's (USM's) the parameters-frequency, amplitude, phase difference using FPGA. The proposed DMC can control parameters directly by digital logic through a FPGA. Since it has counter circuit for rotary encoder to measure position and velocity of USM, the other separate circuits are unnecessary. Therefore, it could reduce the size of controller and the production cost. Finally, to verify the performance of proposed DMC, we tested the speed characteristic of two types USM with no-load as adjusting the parameters.

• Journal of Power Electronics
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• v.15 no.1
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• pp.131-145
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• 2015

The voltage-source inverters (VSI) supplying a motor drive are prone to open transistor faults. To address this issue in fault-tolerant drives applicable to electric vehicles, a new open transistor fault diagnosis (FD) method is presented in this paper. According to the proposed method, in order to define the FD index, the phase angle of the converter output current is estimated by a simple trigonometric function. The proposed FD method is adaptable, simple, capable of detecting multiple open switch faults and robust to load operational variations. Keeping the FD in mind as a mandatory part of the fault tolerant control algorithm, the FD block is applied to a five-phase converter supplying a multiphase fault-tolerant PM motor drive with non-sinusoidal unbalanced current waveforms. To investigate the performance of the FD technique, the fault-tolerant sliding mode control (SMC) of a five-phase brushless direct current (BLDC) motor is developed in this paper with the embedded FD block. Once the theory is explained, experimental waveforms are obtained from a five-phase BLDC motor to show the effectiveness of the proposed FD method. The FD algorithm is implemented on a field programmable gate array (FPGA).

• The Transactions of the Korean Institute of Power Electronics
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• v.11 no.2
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• pp.127-134
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• 2006

This paper describes a fully hardware realization of vector controller for the permanent magnet synchronous motor (PMSM) using high density field programmable gate mays (FPGA). In the proposed system, the vector controller including vector transformation , PI regulator, position and speed measurement, current measurement, and space vector PWM blocks is implemented in a FPGA using a VHSIC hardware description language (VHDL). The experimental results using a 1.1kW PMSM are provided to show the validity of the proposed system.

• Journal of Power Electronics
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• v.10 no.1
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• pp.65-71
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• 2010

This paper presents the design and implementation of voltage source inverter type SVPWM based speed control of an induction motor using a fuzzy PI controller. This scheme enables us to adjust the speed of the motor by controlling the frequency and amplitude of the stator voltage; the ratio of the stator voltage to the frequency should be kept constant. A model of the fuzzy control system is implemented in real time with a Xilinx FPGA XC3S 400E. It is introduced to maintain a constant speed to when the load varies.

• Journal of Electrical Engineering and Technology
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• v.13 no.1
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• pp.362-371
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• 2018

This work proposes FPGA implementation of Carrier Disposition PWM for closed loop seven level diode clamped multilevel inverter in speed control of induction motor. VLSI architecture for carrier Disposition have been introduced through which PWM signals are fed to the neutral point seven level diode clamped multilevel using which the speed of the induction motor is controlled. This proposed VLSI architecture makes the power circuit to work better with reduced stresses across the switches and a very low voltage and current total harmonic distortion (THD). The output voltages, currents, torque & speed characteristics for seven level neutral point diode clamped multilevel inverter for AC drive was studied. It has observed the proposed scheme introduces less distortion and harmonics. The results were validated using real time results.

• Proceedings of the KIPE Conference
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• 2005.07a
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• pp.254-256
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• 2005

This paper describes a design of a vector control module for AC motor using high density FPGA. In the proposed vector controller, the vector control blocks including inverse dq transform, space vector PWM and quadrature encoder pulse module are implemented in a FPGA using a VHDL. The simulation results are provided to show the validity of the proposed vector control module.