• Journal of the Microelectronics and Packaging Society
• /
• v.19 no.3
• /
• pp.57-62
• /
• 2012

In this paper, numerical analysis by finite element method, parameter design by the Taguchi method and ANOVA method were used to analyze about effect of design deviations and thickness variations on warpage of FCCSP substrate. Based on the computed results, it was known that core material in substrate was the most determining deviation for reducing warpage. Solder resist, prepreg and circuit layer were insignificant effect on warpage relatively. But these results meant not thickness effect was little importance but mechanical properties of core material were very effective. Warpage decreased as Solder resist and circuit layer thickness decreased but effect of prepreg thickness was conversely. Also, these results showed substrate warpage would be increased to maximum 40% as thickness deviation combination. It meant warpage was affected by thickness tolerance under manufacturing process even if it were met quality requirements. Threfore, it was strongly recommended that substrate thickness deviation should be optimized and controlled precisely to reduce warpage in manufacturing process.

• Journal of the Microelectronics and Packaging Society
• /
• v.27 no.1
• /
• pp.67-73
• /
• 2020

In this paper, we used FEM technique to perform warpage and von Mises stress analysis on PCB according to the cavity structures of embedded PCB for FCCSP and the types of prepreg material. One-half substrate model and static analysis are applied to the FEM. According to the analysis results of the warpage, as the gap between the cavity and the chip increased, warpage increased and warpage increased when prepreg material with higher modularity and thermal expansion coefficient was applied. The analysis results of the von Mises stress show that the effect of the gap between the cavity and the chip varies depending on prepreg material. In other words, when material whose coefficient of thermal expansion is significantly higher than that of core material, the stress increased as the gap between the cavity and the chip increased. When the prepreg with the coefficient of thermal expansion lower than the core material is applied, the result of stress is opposite. These results indicate that from a reliability perspective, there is a correlation between the structure of the cavity where embedded chips are loaded and prepreg material.