• Title/Summary/Keyword: FAB line

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The Arrangement of Stocker for Optimization Number and Utilization (Stocker 수와 가동률의 최적화를 위한 Stocker 배치 방법)

  • 안종호
    • Proceedings of the Korea Society for Simulation Conference
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    • 1999.10a
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    • pp.30-34
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    • 1999
  • 반도체 산업의 시장은 매년 증가하고 있으며 생산환경, 설비 등의 변화로 인하여 매년 많은 수의 기존 FAB Line이 변화되고 새로이 건설되고 있다. 그 동안 반도체 산업의 성장은 주로 설계기술, 설비기술, Chip Size의 소형화 등의 기술적인 개발에 의존하고 있었으나 반도체 기술의 확산, 시장 경쟁력의 격화 등으로 생산성 향상에 의한 원가절감이 성장의 근본요인이 되고 있다. 즉 FAB Line의 시스템적인 관리통제의 기술이 반도체 산업의 성패를 좌우하는 시대로 접어든 것이다. FAB Line은 크게 Bay와 Stocker, 각 Lot (또는 Batch) 들을 운반하는 Inter-System으로 구성된다. 이러한 Line은 대체 특성, 분기 현상, 돌발 상황 등의 특수한 경우가 많아 Analytic 모델로 접근하기에는 사실상 불가능하다. 특히 Stocker와 Bay 간의 이동은 더욱 그렇다. 따라서 적절한 설계과정을 거친 Simulation적 접근이 합리적이다. 본 논문에서는 FAB Line에서 Stocker 배치의 다양한 실험을 수행하였다. 그 결과 Line에서 최적의 Stocker 수와 가동률을 알아내었다. 반도체 생산라인에서는 제품별 또는 같은 제품이라도 Version이 다른 경우 FAB 공정가운데 약 10% 내외만이 바뀌는 점을 감안하면 본 논문의 결과는 쉽게 생산현장에 적용될 수 있을 것이며, 이것은 비단 반도체 공정뿐 아니라 제조업에서도 적용되리라 예상한다.

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Direct Carrier System Based 300mm FAB Line Simulation (Direct 반송방식에 기반을 둔 300mm FAB Line 시뮬레이션)

  • Lee, Hong-Soon;Han, Young-Shin;Lee, Chil-Gee
    • Journal of the Korea Society for Simulation
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    • v.15 no.2
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    • pp.51-57
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    • 2006
  • Production environment of semiconductor industry is shifting from 200mm wafer process to 300mm wafer process. In the new era of semiconductor industry, FAB (fabrication) Line Automation is a key issue that semiconductor industry is facing in shifting from 200mm wafer fabrication to 300mm wafer fabrication. In addition, since the semiconductor manufacturing technologies are being widely spread and market competitions are being stiffened, cost-down techniques became basis of growth. Most companies are trying to reduce average cycle time to increase productivity and delivery time. In this paper, we simulated 300mm wafer fabrication semiconductor manufacturing process by laying great emphasis on reduce average cycle time.

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The Study of Event Graph Modeling for Material Handling System in Semiconductor Fab (반도체 fab 라인의 물류 설비 모델링 방법론에 대한 연구)

  • Lee Jin-Hwi;Choi Byoung-Kyu
    • Proceedings of the Korean Operations and Management Science Society Conference
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    • 2006.05a
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    • pp.1765-1770
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    • 2006
  • 본 논문에서는 반도체 fab 라인의 물류 설비를 event graph로 모델링 하는 방법론을 제안하고 있다. 최근 반도체 fab 라인 같은 대표적인 자본 집약적 제조라인에서는 운영단계에서 투입 계획, PM schedule 및 operation rule 등을 변화시켜 가며 평가 및 검증해 볼 수 있는 what-if simulation을 위한 line simulator의 필요성이 점점 높아지고 있다. 그러나 상용 simulator는 각 제조라인의 특성에 맞게 customization하는데 많은 시간과 비용이 소요될 뿐만 아니라 특성을 반영하는데 한계가 있다. 따라서 이러한 line simulator를 개발할 때 근간이 되는 설비의 simulation model이 필요하다. 이 때 설비들은 생산(processing) 및 물류(handling) 설비로 나눌 수 있는데, 본 논문에서는 반도체 fab 라인의 물류 설비 모델링 방법을 제시하고 실제 물류 설비를 모델링 해 봄으로써 그 효용성을 알아본다.

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Analysis semiconductor FAB line on computer modeling & simulation (컴퓨터 모델링과 시뮬레이션을 통한 반도체 FAB Line 분석)

  • 채상원;한영신;이칠기
    • Proceedings of the Korea Society for Simulation Conference
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    • 2002.11a
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    • pp.115-121
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    • 2002
  • The growth of semiconductor industry attracted to researchers like design, facility technique and making small size chip areas. But nowadays, cause of technology extension and oversupply and price down, yield improvement is the most important point on growth. This paper describes the computer mode]ing technique as the solutions to analyze the problem, to formalize the semiconductor manufacturing process and to build advanced manufacturing environments. The computer models are built referring an existing 8' wafer production line in Korea.

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Possibility of Spreading Infectious Diseases by Droplets Generated from Semiconductor Fabrication Process (반도체 FAB의 비말에 의한 감염병 전파 가능성 연구)

  • Oh, Kun-Hwan;Kim, Ki-Youn
    • Journal of Korean Society of Occupational and Environmental Hygiene
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    • v.32 no.2
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    • pp.111-115
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    • 2022
  • Objectives: The purpose of this study is to verify whether droplet-induced propagation, the main route of infectious diseases such as COVID-19, can occur in semiconductor FAB (Fabrication), based on research results on general droplet propagation. Methods: Through data surveys droplet propagation was modeled through simulation and experimental case analysis according to general (without mask) and mask-wearing conditions, and the risk of droplet propagation was inferred by reflecting semiconductor FAB operation conditions (air current, air conditioning system, humidity, filter conditions). Results: Based on the results investigated to predict the possibility of spreading infectious diseases in semiconductor FAB, the total amount of droplet propagation (concentration), propagation distance, and virus life in FAB were inferred by reflecting the management parameter of semiconductor FAB. Conclusions: The total amount(concentration) of droplet propagation in the semiconductor fab is most affected by the presence or absence of wearing a mask and the line air dilution rate has some influence. when worn it spreads within 0.35~1m, and since the humidity is constant the virus can survive in the air for up to 3 hours. as a result the semiconductor fab is judged to be and effective space to block virus propagation due to the special environmental condition of a clean room.

Capacitated Fab Scheduling Approximation using Average Reward TD(${\lambda}$) Learning based on System Feature Functions (시스템 특성함수 기반 평균보상 TD(${\lambda}$) 학습을 통한 유한용량 Fab 스케줄링 근사화)

  • Choi, Jin-Young
    • Journal of Korean Society of Industrial and Systems Engineering
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    • v.34 no.4
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    • pp.189-196
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    • 2011
  • In this paper, we propose a logical control-based actor-critic algorithm as an efficient approach for the approximation of the capacitated fab scheduling problem. We apply the average reward temporal-difference learning method for estimating the relative value functions of system states, while avoiding deadlock situation by Banker's algorithm. We consider the Intel mini-fab re-entrant line for the evaluation of the suggested algorithm and perform a numerical experiment by generating some sample system configurations randomly. We show that the suggested method has a prominent performance compared to other well-known heuristics.

A Case Study for Modeling and Simulation Analysis of the In-Line EFEM Cluster Tool Architecture (인라인 EFEM 클러스터 장비 아키텍처의 모델링 및 분석 사례 연구)

  • Han, Yong-Hee
    • Journal of the Korea Society for Simulation
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    • v.21 no.2
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    • pp.41-50
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    • 2012
  • In this study we first explain details of the semiconductor manufacturing processes and cluster tools. Then we discuss the problems in current fab layout and cluster tool architecture. As a solution to these problems, we propose the ILE (In-Line EFEM) architecture in which wafer movements are conducted through interconnected EFEMs (Equipment Front End Modules) instead of AMHS (Automated Material Handling System). Then we model the pilot ILE system using discrete event simulation and analyze the cycle time. Finally we compare three different scenarios of equipment layout in the ILE system in terms of cycle time.

Simulation of Efficient Flow Control for FAB of Semiconductor Manufacturing (반도체 FAB 공정에서의 효율적 흐름제어를 위한 시뮬레이션)

  • 한영신;전동훈
    • Journal of Korea Multimedia Society
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    • v.3 no.4
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    • pp.407-415
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    • 2000
  • The ultimate goal of flow control in the semiconductor fabrication process, one of the most equipment-intensive and complex manufacturing process, is to reduce lead time and work in process. In this paper, we propose stand alone layout in the form of job shop using group technology to improve the Productivity and eliminate the inefficiency in FMS (flexible manufacture system). The performance of stand alone layout and in-line layout are analyzed and compared while varying number of device variable chanties. The analysis of in-line layout is obtained by examining its adoption in the memory products of semiconductor factory. The comparison is performed through simulation using ProSys; a window 95 based discrete system simulation software, as a tool for comparing performance of two proposed layouts. The comparison demonstrates that when the number of device variable change is small, in-line layout is more efficient in terms of production Quantity. However, as the number of device variable change is more than 14 times, stand alone layout prevails over in-line layout.

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Disulfide Bond Bridged Divalent Antibody-Toxin, $(Fab-PE38fl)_2$ with the Toxin PE38 Fused to the Light Chain

  • Won, Jae-Seon;Choe, Mu-Hyeon
    • Journal of Microbiology and Biotechnology
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    • v.18 no.8
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    • pp.1475-1481
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    • 2008
  • B3 antibody specifically binds the $Lewis^Y$-related carbohydrate antigen of many carcinomas, and it is used as a model antibody in this study. In a previous study, the Fab fragment of the antibody was fused to a 38 kDa truncated form of Pseudomonas exotoxin A, PE38, to make Fab-PE38, where PE38 is fused to the Fd fragment of the Fab domain. This parent monomer molecule, Fab-PE38, had no cysteine in the hinge region, and it could not make a disulfide bond to form a disulfide bond bridged homodimer. In this study, we constructed three different kinds of divalent Fab-toxin fusion homodimers where the toxin is fused to the light chain of Fab, $(Fab-PE38fl)_2$. In addition to the PE38 toxin fused to the light chain, these three molecules have different hinge sequences hi, h2, and h3 making Fabh1-, Fabh2-, and Fabh3-PE38fl monomers, respectively. These hinges contain only one cysteine on different positions of the hinge sequence. The disulfide bond between the hinge region of two monomers forms homodimers $(Fabh1-PE38fl)_2$, $(Fabh2-PE38fl)_2$, and $(Fabh3-PE38fl)_2$. The refolding yields of these dimers were 5-16-fold higher than a previously constructed dimer where the PE38 was fused to the Fd fragment $(Fabh2-PE38)_2$ [8]. Our data suggest that the steric repulsion between the two PE38s in $(Fabh1-PE38)_2$ during disulfide bridge formation is relieved by fusing it at the end of the light chain. The best cytotoxicity value of these dimers showed about 2.5-fold higher on an MCF7 cell line than that of the monovalent reference molecule in ng/ml scale, which is 15-fold higher in pM scale.

Studies on the Morphology of the CVD Tungsten Film (기상화학증착 텅스텐 막질의 표면 형태에 관한 연구)

  • Jeon, Dong-Soo;Kim, Sun-Rae;Lee, Sung-Young;Park, Young-Kyou;Jeon, Young-Soo
    • Proceedings of the IEEK Conference
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    • 2008.06a
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    • pp.377-378
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    • 2008
  • Morphology is one of important issues when developing a layer of CVD-W. we need to control the process more precisely that is filling gaps between BL(bit line)and DC(direct contact). Whereas we are facing to difficulties like not-filling contacts due to marginal problems in deposition and etching process. This paper is for investigating a method to resolve morphology problem with strengthening the condition of seasoning.

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