• Title/Summary/Keyword: External/Internal Memory

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A Study for the Efficient Memory Management in time of using Cross Compiler (크로스 컴파일러에서의 효율적인 메모리 사용 기법에 대한 연구)

  • Kyong, Bo-Hyun;Jeon, Seung-Hun
    • Proceedings of the KIEE Conference
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    • 2003.11c
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    • pp.641-644
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    • 2003
  • 본 논문은 RTOS(Real-Time Operation System, 리턴어드레스를 위한 유저스택사용 RTOS가 탑재된 CE(Consumer Electronic)제품상에서 리턴어드레스가 유저스택으로 저장하는 것을 지원하지 않는 컴파일러를 위한 알고리즘이며 실험을 위하여 제안된 알고리즘을 상용 컴파일러에 적용하여 비교해보도록 하겠다. 우선 기존 컴파일러 알고리즘으로는 Task마다 할당된 유저스택영역이 존재하며 Task가 수행중 발생된 리턴어드레스는 즉시 할당된 유저스택으로 저장하는 알고리즘을 갖고있다. 이런 알고리즘으로 인하여 인스트럭션이 수행중 빈번한 메모리 접근(external memory)가 발생한다. 그러나 제안된 알고리즘은 Task 수행중에는 리턴어드레스를 시스템스택(internal memory)에 저장한 후 Task 전환이 발생할 경우 일시에 시스템 스택에 저장된 리턴어드레스를 유저스택으로 이동하게 되므로 Task 수행중에는 시스템 스택만을 접근하므로 task의 수행시간을 단축할 수가 있다. 그리고 실험을 위하여 상용 컴파일러들에 본 알고리즘을 적용하였다. 상용 컴파일러로는 매번 리턴어드레스를 자동으로 Task별 할당된 유저스택에 저장할 수 있도록 지원해주는 TASKING 컴파일러(Altium 사)와 그렇지 않은 KEIL컴파일러(KEIL사)가 있으며 본 알고리즘을 KEIL 컴파일러에 적용하여 실험을 하여 TASKING 컴파일러와 비교한 결과 유저스택을 지원하는 TASKING(Altium사) 컴파일러에서 구현한 CE제품의 Response time이 KEIL 컴파일러에서 구현한 CE제품의 Response time 값이 같게 나왔다. 그러므로 KEIL 컴파일러상에 본 알고리즘을 적용시킬 경우 RTOS가 탑재된 CE제품을 보다 용이하게 구현할 수가 있다.

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Finding Smartphone's Factors which Affect Satisfaction or Dissatisfaction based on KANO Model (KANO 모델을 활용한 스마트폰의 만족 및 불만족 요인 분석)

  • Lee, Sang-Gun;Lee, Sin-Seok;Kang, Ju-Young
    • The Journal of Information Systems
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    • v.20 no.3
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    • pp.257-277
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    • 2011
  • The current study categorizes factors of smartphone into three, using KANO model: attractive factors which cause only product satisfaction, must-be factors for dissatisfaction, and one-dimensional factors for both. Based on it, it presents a new model for the effects that smartphone factors have on satisfaction or dissatisfaction. The purpose is to theoretically explain that smartphone factors on which companies and users place a high value can actually affect satisfaction or dissatisfaction. After choosing 15 factors out of 25 which had been selected through literature study, these were divided into attractive, must-be, and one-dimensional ones. 93 out of 109 questionnaires returned were used for analysis. After frequency analysis using SPSS were conducted on the surveys, the factors were grouped, based on KANO table. The grouping results are as follows. Attractive factors include 'expansion slots for external memory, battery desorption, brand awareness, mobile banking and internet telephony'. Must-be ones include 'multi-touch, information security, entertainment, information retrieval, location based service and SNS. Finally, 'screen visibility, size of internal memory, the amount of internal memory, battery life, and response to after-sales service' are classified as one-dimensional factors. A critical finding of this paper is that since the results are different depending on the operating system of smartphones, it must be taken into consideration in studies on smartphones. The wide and rapid spread of smartphones has changed people's lifestyle as well as business environment, which forces companies to compete with each other to adapt to the changed circumstances. In this competitive system, studies on smartphone factors of satisfaction and dissatisfaction are essential for firms to establish a new strategy. From this point of view, the present paper is expected to be a basic material for enterprises not only to develop goods and services that maximize customer satisfaction and minimize dissatisfaction, but also to establish the future business strategy.

The Hardware Architecture of Efficient Intra Predictor for H.264/AVC Decoder (H.264/AVC 복호기를 위한 효율적인 인트라 예측기 하드웨어 구조)

  • Kim, Ok;Ryoo, Kwang-Ki
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.47 no.5
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    • pp.24-30
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    • 2010
  • In this paper, we described intra prediction which is the one of techniques to be used for higher compression performance in H.264/AVC and proposed the design of intra predictor for efficient intra prediction mode processing. The proposed system is consist of processing elements, precomputation processing elements, an intra prediction controller, an internal memory and a register controller. The proposed system needs the reduced the computation cycles by using processing elements and precomputation processing element and also needs the reduced the number of access time to external memory by using internal memory and registers architecture. We designed the proposed system with Verilog-HDL and verified with suitable test vectors which are encoded YUV files. The proposed architecture belongs to the baseline profile of H.264/AVC decoder and is suitable for portable devices such as cellular phone with the size of $176{\times}144$. As a result of experiment, the performance of the proposed intra predictor is about 60% higher than that of the previous one.

Duty Cycle-Corrected Analog Synchronous Mirror Delay for High-Speed DRAM (고속 DRAM을 위한 Duty Cycle 보정 기능을 가진 Analog Synchronous Mirror Delay 회로의 설계)

  • Choi Hoon;Kim Joo-Seong;Jang Seong-Jin;Lee Jae-Goo;Jun Young-Hyun;Kong Bai-Sun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.9 s.339
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    • pp.29-34
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    • 2005
  • This paper describes a novel internal clock generator, called duty cycle-corrected analog synchronous mirror delay (DCC-ASMD). The proposed circuit is well suited for dual edge-triggered systems such as double data-rate synchronous DRAM since it can achieve clock synchronization within two clock cycles with accurate duty cycle correction. To evaluate the performance of the proposed circuit, DCC-ASMD was designed using a $0.35\mu$m CMOS process technology. Simulation results show that the proposed circuit generates an internal clock having $50\%$ duty ratio within two clock cycles from the external clock having duty ratio range of $40\;\~\;60$.

VirtAV: an Agentless Runtime Antivirus System for Virtual Machines

  • Tang, Hongwei;Feng, Shengzhong;Zhao, Xiaofang;Jin, Yan
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.11 no.11
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    • pp.5642-5670
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    • 2017
  • Antivirus is an important issue to the security of virtual machine (VM). According to where the antivirus system resides, the existing approaches can be categorized into three classes: internal approach, external approach and hybrid approach. However, for the internal approach, it is susceptible to attacks and may cause antivirus storm and rollback vulnerability problems. On the other hand, for the external approach, the antivirus systems built upon virtual machine introspection (VMI) technology cannot find and prohibit viruses promptly. Although the hybrid approach performs virus scanning out of the virtual machine, it is still vulnerable to attacks since it completely depends on the agent and hooks to deliver events in the guest operating system. To solve the aforementioned problems, based on in-memory signature scanning, we propose an agentless runtime antivirus system VirtAV, which scans each piece of binary codes to execute in guest VMs on the VMM side to detect and prevent viruses. As an external approach, VirtAV does not rely on any hooks or agents in the guest OS, and exposes no attack surface to the outside world, so it guarantees the security of itself to the greatest extent. In addition, it solves the antivirus storm problem and the rollback vulnerability problem in virtualization environment. We implemented a prototype based on Qemu/KVM hypervisor and ClamAV antivirus engine. Experimental results demonstrate that VirtAV is able to detect both user-level and kernel-level virus programs inside Windows and Linux guest, no matter whether they are packed or not. From the performance aspect, the overhead of VirtAV on guest performance is acceptable. Especially, VirtAV has little impact on the performance of common desktop applications, such as video playing, web browsing and Microsoft Office series.

MSC-based Test-case Generation Module for Railway Signaling Software Testing (철도신호 소프트웨어 테스팅을 위한 MSC 기반 테스트케이스 생성 모듈)

  • Hwang, Jong-Gyu;Baek, Jong-Hyun
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.64 no.3
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    • pp.138-142
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    • 2015
  • Most of the existing studies on functional safety testing for the railway signaling system software have focused on verifying the functional safety through the monitoring of internal memory embedded railway signaling system. However, the railway signaling system is one of the typical embedded control system in the railway sector, and the embedded software has a characteristic of generating an appropriate outputs through the combination of internal processing in consideration of the current internal status and external input. Therefore, the test approach of using the interface communication channel can be effective way for the functional testing for railway signaling system software in consideration of these characteristic. Since a communication interface specification of the railway signal system has a the properties of the sequence input and output signals, test-case for software testing is the most effective methodology by MSC (Message Sequence Chart) language, one of the graphic language. The MSC-based test-case generating methodology for signaling system software was proposed in this paper.

WWCLOCK: Page Replacement Algorithm Considering Asymmetric I/O Cost of Flash Memory (WWCLOCK: 플래시 메모리의 비대칭적 입출력 비용을 고려한 페이지 교체 알고리즘)

  • Park, Jun-Seok;Lee, Eun-Ji;Seo, Hyun-Min;Koh, Kern
    • Journal of KIISE:Computing Practices and Letters
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    • v.15 no.12
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    • pp.913-917
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    • 2009
  • Flash memories have asymmetric I/O costs for read and write in terms of latency and energy consumption. However, the ratio of these costs is dependent on the type of storage. Moreover, it is becoming more common to use two flash memories on a system as an internal memory and an external memory card. For this reason, buffer cache replacement algorithms should consider I/O costs of device as well as possibility of reference. This paper presents WWCLOCK(Write-Weighted CLOCK) algorithm which directly uses I/O costs of devices along with recency and frequency of cache blocks to selecting a victim to evict from the buffer cache. WWCLOCK can be used for wide range of storage devices with different I/O cost and for systems that are using two or more memory devices at the same time. In addition to this, it has low time and space complexity comparable to CLOCK algorithm. Trace-driven simulations show that the proposed algorithm reduces the total I/O time compared with LRU by 36.2% on average.

Enhanced Prediction for Low Complexity Near-lossless Compression (낮은 복잡도의 준무손실 압축을 위한 향상된 예측 기법)

  • Son, Ji Deok;Song, Byung Cheol
    • Journal of Broadcast Engineering
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    • v.19 no.2
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    • pp.227-239
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    • 2014
  • This paper proposes an enhance prediction for conventional near-lossless coder to effectively lower external memory bandwidth in image processing SoC. First, we utilize an already reconstructed green component as a base of predictor of the other color component because high correlation between RGB color components usually exists. Next, we can improve prediction performance by applying variable block size prediction. Lastly, we use minimum internal memory and improve a temporal prediction performance by using a template dictionary that is sampled in previous frame. Experimental results show that the proposed algorithm shows better performance than the previous works. Natural images have approximately 30% improvement in coding efficiency and CG images have 60% improvement on average.

A Study on Security Police against Problem of Using Secure USB according to National Assembly Network Separation (국회 네트워크 분리에 따른 보안 USB 메모리의 사용 문제점 및 보안 대책 연구)

  • Nam, Won-Hee;Park, Dea-Woo
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2012.05a
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    • pp.471-474
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    • 2012
  • The administration of government agencies and Law enforcement agencies is utilize. that network separation and Establish CERT for network security. However, the legislature has a basic security system. so a lot of relative vulnerability. In this paper, study for security National Assembly and the National Assembly Secretariat, at Library of National Assembly on legislative National Assembly for information security and network configuration, network and external Internet networks is to divide the internal affairs. Network separation in accordance with the movement of materials to use secure USB memory, the user has the uncomfortable issues. Problem analysis and security vulnerabilities on the use of USB memory is study the problem. User efficiency and enhance security.

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A Comparative Study on the Individual Personality and Intelligence for Criminal (개인의 성격과 지능이 범죄에 미치는 영향에 관한 연구)

  • Rim, Sang-Gon
    • Korean Security Journal
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    • no.8
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    • pp.309-336
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    • 2004
  • Approximately equivalent to character disorder or character neuroses or behavioral reaction. For a discussion of the term as used currently, in the 1968 revision of psychiatric nomenclature(DSM-II). In DSM-I(1952 nomenclature), this term referred to those cases in which the personality, in its struggle for adjustment to internal and external stresses, utilized primarily a pattern of action or behavior rather than symptoms in the mental, somatic or emotional spheres. There is minimal subjective anxiety and little or no sense of distress. As thus defined, there are three main groups of personality disorder, personality pattern disturbance, personality trait disturbance and sociopathic, personality disturbance. Morton Prince asks whether a subconscious process can perform the same function as are ordinarily performed by conscious intelligence that is to say memory, perception, reasoning, imagination, volition, affectivity, etc? He cites clinical material at great length, concluding that the quality of the functions performed they frequently exhibit, that which is characteristic of intelligence.

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