• The Transactions of the Korean Institute of Electrical Engineers D
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• v.49 no.3
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• pp.133-144
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• 2000

Genetic Algorithm(GA) has been known as a method of solving large-scaled optimization problems with complex constraints in various applications. Since a major drawback of the GA is that it needs a long computation time, the hardware implementations of Genetic Algorithm Processors(GAP) are focused on in recent studies. In this paper, a hardware-oriented GA was proposed in order to save the hardware resources and to reduce the execution time of GAP. Based on steady-state model among continuos generation model, the proposed GA used modified tournament selection, as well as special survival condition, with replaced whenever the offspring's fitness is better than worse-fit parent's. The proposed algorithm shows more than 30% in convergence speed over the conventional algorithm in simulation. Finally, by employing the efficient pipeline parallelization and handshaking protocol in proposed GAP, above 30% of the computation speed-up can be achieved over survival-based GA which runs one million crossovers per second (1㎒), when device speed and size of application are taken into account on prototype. It would be used for high speed processing such of central processor of evolvable hardware, robot control and many optimization problems.

• 제어로봇시스템학회:학술대회논문집
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• 2005.06a
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• pp.1355-1360
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• 2005

In this paper, we approach the problem of image filter design automation using a kind of intrinsic evolvable hardware architecture. For the purpose of implementing the intrinsic evolution process in a common FPGA chip and evolving a complicated digital circuit system-image filter, the design automation system employs the reconfigurable circuit architecture as the reconfigurable component of the EHW. The reconfigurable circuit architecture is inspired by the Cartesian Genetic Programming and the functional level evolution. To increase the speed of the hardware evolution, the whole evolvable hardware system which consists of evolution algorithm unit, fitness value calculation unit and reconfigurable unit are implemented by a commercial FPGA chip. The Celoxica RC1000 card which is fitted with a Xilinx Virtex xcv2000E FPGA chip is employed as the experiment platform. As the result, we conclude the terms of the synthesis report of the image filter design automation system and hardware evolution speed in the Celoxica RC1000 card. The evolved image filter is also compared with the conventional image filter form the point of filtered image quality.

• Proceedings of the IEEK Conference
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• 2007.07a
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• pp.463-464
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• 2007

This paper presents the hardware-based genetic algorithm, written in VHDL. Due to parallel computation and no function call overhead, a hardware-based GA advantage a speedup over a software-based GA. The proposed architecture is constructed on a field-programmable gate arrays, which are easily reconfigured. Since a general-purpose GA requires that the fitness function be easily changed, the hardware implementation must exploit the reprogrammability.

• 제어로봇시스템학회:학술대회논문집
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• 2002.10a
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• pp.102.6-102
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• 2002

$\textbullet$ Introduction $\textbullet$ Background - Handel-C and Evolvable Hardware $\textbullet$ Fitter Block $\textbullet$ Hardware Implementation $\textbullet$ Total System Overview $\textbullet$ Results $\textbullet$ Conclusion and Future Works

• Proceedings of the Korean Information Science Society Conference
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• 2001.04b
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• pp.307-309
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• 2001

진화 하드웨어(Evolvable Hardware: EHW)는 환경에 적응하여 스스로 하드웨어 구성을 변경할 수 있어서 근래에 많은 관심을 모으고 있는 분야이다. EHW는 목표 하드웨어를 탐색하기 위해 일반적으로 진화 알고리즘을 사용하는데, 진화 알고리즘은 하나의 목표 하드웨어 탐색 기능만을 수행한다. 본 논문에서는 종분화(Speciation) 알고리즘을 EHW에 적용하여 더욱 다양한 회로들을 얻을 수 있음을 보인다. 종분화 알고리즘은 동시에 여러 종의 해를 발견하게 해주고, 기존 진환 알고리즘에 비해 후반 탐색범위도 넓게 유지된다. 이를 6멀티플렉서의 진화에 적용한 결과, 다양한 품종의 하드웨어를 동시에 얻었고, 기존 진화 알고리즘에 비해 35%정도 빠른 세대에 해를 발견할 수 있었다.

• Journal of Korea Multimedia Society
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• v.4 no.1
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• pp.82-90
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• 2001

Genetic Algorithm(GA) has known as a method of solving NP problem in various applications. Since a major drawback of the GA is that it needs a long computation time, the hardware implementation of Genetic Algorithm is focused on in recent studies. This paper proposes a new type of embedded one chip computer fort Hardware Implementation of Genetic Algorithm. The proposed embedded one chip computer consists of 16 Bit CPU care and hardware of genetic algorithm. In contrast to conventional hardware oriented GA which is dependent on main computer in the process of GA, the proposed embedded one chip computer is independent on main computer. Conventional hardware GA uses the fixed length of chromosome but the proposed embedded one chip computer uses the variable length of chromosome by employing the efficient 16 bit Pipeline Unit. Experimental results show that the proposed one chip computer is applicable to the design of evolvable hardware for Random NRZ bit synchronization circuit.

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.452-455
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• 1999

We introduce an evolutionary approach to on-line learning for mobile robot control using reconfigurable hardware. We use genetic programming as an evolutionary engine. Control programs are encoded in tree structure. Genetic operators, such as node mutation, adapt the program trees based on a set of training cases. This paper discusses the advantages and constraints of the evolvable hardware approach to robot learning and describes a FPGA implementation of the presented genetic programming method.

• Proceedings of the KIEE Conference
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• 1999.07g
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• pp.2944-2946
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• 1999

In this paper, digital circuit evolution is proposed as an intrinsic evolvable system. Evolutionary hardware is a reconfigurable one which adapt itself to the environment and evolve its structure to realize desired performance. By using special FPGA and genetic algorithm, we have made a prototype of intrinsic hardware evolution system. As an example for digital circuit evolution, full adder realization is performed. As the result of this, a very complex structure of digital circuit performing full adder was created. Analysis made on the hardware revealed that some undetermined circuits were developed.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 2000.11a
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• pp.111-114
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• 2000

종의 분화는 생명체의 다양성을 유지하며, 좀더 환경에 적합한 생명체를 탄생시킨다. 본 논문에서는 이러한 종의 분화 개념을 도입한다. 개체군의 각 개체들이 돌연변이를 통하여 자손을 생성하고, 그 중 일부가 분화하여 다음 세대의 개체를 이룬다. 각 개체들은 돌연변이에 의해 결정되는 일정한 해밍 공간 내외를 탐색공간으로 하고, 분화를 통하여 유효한 탐색공간을 점차 넓혀 탐색공간 전체에 대한 효율적인 탐색을 수행한다. 돌연변이를 통한 진화 방법으로 진화 하드웨어에 적용할 경우 내부구조의 변경이 적어 빠른 탐색효과를 갖을 수 있다. 제안된 알고리즘을 2개의 최적화 문제에 적용하여 그 유용성을 확인한다.

• Proceedings of the Korean Information Science Society Conference
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• 2002.10d
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• pp.238-240
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• 2002

진화 가능한 하드웨어의 개발은 유전자 알고리즘의 새로운 가능성을 열어주었고 이에 적합한 다양한 방법이 제시되어 왔다. 하지만 일반적인 유전자 알고리즘으로는 Genetic drift가 생기거나 지역해에 빠지는 등 한계가 있기 때문에 이를 해결하기 위한 방안으로 종분화 알고리즘이 도입되고 있다. 현재까지 다양한 종분화 알고리즘이 소개되었는데 이들은 이전의 알고리즘과 비교하였을 때 높은 다양성을 유지하면서 더 좋은 해를 찾아낸다. 이 논문에서는 진화 하드웨어상에서 이러한 종분화 알고리즘들의 장단점 및 특징을 여러 비교기준을 통해 제시한다. 실험결과 Deterministic Crowding과 Struggle GA가 가장 좋은 성능을 나타내었다.