• The Transactions of The Korean Institute of Electrical Engineers
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• v.60 no.6
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• pp.1255-1260
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• 2011

In this paper, we study on the reliability of Very High-rate Power Line Communication (VH-PLC) for Smart Grid, so that the resultant data rate is over 400Mbps at a physical layer. Firstly, reviewing the research trend of the PLC, we discuss the required techniques for supporting the Smart Grid. Considering a pre-specification with the value of several parameters, we investigate a multi-carrier modulation technique to overcome limitations of higher rate transmission under power line channel environments. Then, we propose a system specification of the VH-PLC in the sense of enhancing two features. One is resolving the problem of the co-existence of the deployed high-speed PLC according to the published standardization of KS X 4600-1 in Korea. The other is getting better performance on the grid adopting the diverse element techniques, such as multi-carrier modulation, a subcarrier utilization mode, a variable rate LDPC (Low Density Parity Check) code, and a time and frequency diversity technique. Further, a simulation tool, composed of an Event-Driven simulator and a Time-Driven simulator, is developed for the purpose of verifying the system performance and continuously cross-checking the test bench signal of the proposed VH-PLC system.

• Proceedings of the Korean Institute of Navigation and Port Research Conference
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• 1999.10a
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• pp.73-81
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• 1999

Inchon Port is the second largest import-export port of Korea, and has the point ant issue such as the excessive logistics cost because of the limits of handing capacity and the chronic demurrage. There is few research activities on the analysis and improvement of the whole port operation, because Inchon Port not only has the dual dock system and various facilities but also handles a various kind of cargo. The purpose of this paper is to develop the simulation program as a long-term strategic support tool, considering the dual dock system and the TOC(terminal operation company) system executed from March, 1997 in Inchon Port. The basic input parameters such as arrival intervals, cargo tons, service rates are analyzed and the probability density function for this parameters are estimated. The main mechanism of simulation model is the discrete event-driven simulation and the next-event time advancing. The program is executed based on the knowledge base and database, and is constructed using VISUAL BASIC and ACCESS database. From the simulation model, it is possible to estimate the demurrage status through analyzing scenarios such as the variation of cargo ton and cargo handing level, the increase of service rate, and so on, and to establish the long-term port strategic plan.

• The KIPS Transactions:PartD
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• v.18D no.4
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• pp.261-274
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• 2011

In recent competitive business environment each enterprise has to be agile and flexible. For these purposes run-time monitoring ofservices provided by an enterprise and early decision making through this becomes core competition of the enterprise. In addition, in order to process various innumerable events which are generated on enterprise systems techniques which make filtering of meaningful data are needed. However, the existing study related with this is nothing but discovering of service faults by monitoring depending upon API of BPEL engine or middleware, or is nothing but processing of simple events based on low-level events. Accordingly, there would be limitations to provide useful business information. In this paper, through situation detection an extended complex event model is presented, which is possible to provide more valuable and useful business information. Concretely, first of all an event processing architecture in an enterprise system is proposed, and event meta-model which is suitable to the proposed architecture is going to be defined. Based on the defined meta-model, It is presented that syntax and semantics of constructs in our event processing language including various and progressive event operators, complex event pattern, key, etc. In addition, an event context mechanism is proposed to analyze more delicate events. Finally, through application studies application possibility of this study would be shown and merits of this event model would be present through comparison with other event model.

• Journal of the Korea Society for Simulation
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• v.4 no.2
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• pp.1-16
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• 1995

The performance of a computer system depends on the system architecture and workload, and the high performance required in many applications can be achieved by the scalability of the system architecture and workload. This paper presents scalable workload, a performance metric of scalable speedup and hierarchical modeling for the scalable computer system as well as the development of the object-oriented simulator spmplC++ Which is an advanced C++ version of the discrete event-driven simulation environment smplE. In addition, this paper presents two examples of applying scalable speedup, hierarchical modeling and simulator smplC++ to analyze the performance effect of the sclcbility in a multiprocessor system and a network-based client/server system.

• Journal of Advanced Marine Engineering and Technology
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• v.30 no.2
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• pp.247-252
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• 2006

Almost ship monitoring systems are event driven alarm system which warn only when the measurement value is over or under set point. These kinds of system cannot warn until signal is growing to abnormal state that the signal is over or under the set point. therefore cannot play a role for preventive maintenance system. This paper proposes fault diagnosis method which is able to diagnose and forecast the fault from present operating condition by analyzing monitored signals with present ship monitoring system without any additional sensors. By analyzing the data with high correlation coefficient(CC), correlation level of interactive data can be defined. Knowledge base of abnormal detection can be built by referring level of CC(Fault Detection CC. FDCC) to detect abnormal data among monitored data from monitoring system and knowledge base of diagnosis built by referring CC among interactive data for related machine each other to diagnose fault part.

• Proceedings of the Korean Society of Marine Engineers Conference
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• 2005.06a
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• pp.281-286
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• 2005

Almost ship monitoring systems are event driven alarm system which warn only when the measurement value is over or under set point. These kinds of system cannot warn while signal is growing to abnormal state until the signal is over or under the set point and cannot play a role for preventive maintenance system. This paper proposes fault diagnosis method which is able to diagnose and forecast the fault from present operating condition by analyzing monitored signals with present ship monitoring system without additional sensors. By analyzing this data having high correlation coefficient(CC), correlation level of interactive data can be understood. Knowledge base of abnormal detection can be built by referring level of CC(Fault Detection CC, FDCC) to detect abnormal data among monitored data from monitoring system and knowledge base of diagnosis built by referring CC among interactive data for related machine each other to diagnose fault part.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.29A no.9
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• pp.76-84
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• 1992

The DSP silicon compiler consists of language compiler, module generator, placement tool, router, layout generation tools, and simulator. In this paper, The language compiler, the module generator, placement tool, and simulator were developed and provided for the system designer. The language compiler translates the designer's system description language into the intermediate form file. The intermediate form file expresses the interconnections and specifications of the cells in the cell library. The simulator was developed and provided for the behavioral verification of the DSP system. For its implementation, the event-driven technique and the C$^{++}$ task library was used. The module generator was developed for the layout of the verified DSP system, and generates the functional block to be used in the DSP chip. And then the placement tool determines the appropriate positions of the cells in the DSP chip. In this paper, the placement tool was implemented by Min-Cut and Simulated Annealing algorithm. The placement process can be controlled by the several conditions input by the system designer.

• Journal of the Korean Operations Research and Management Science Society
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• v.20 no.2
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• pp.159-178
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• 1995

Supervisory control is an approach based on formal language. it is used to model and control discrete event systems in which each discrete event process is represented as an automation. A supervisor is a generator that switches control patterns in such a way that a given discrete evenet process behaves in obedience to various constraints. A flexible manufacturing cell (FMC) is one of discrete evenet systems. Functions necessary for the operation of an FMC are characterized by operational components and informational compoments. The operational components can be modeled using the finite state machines and the informational components can be modeled using the abstract formalism which describes supporting operations of the cell controller. In this paper, we addressed function required for FMC control specification, software engineering aspects on FMC control based on supervisory control, a concept of event queue for resolving synchronization problem, and complexity reduction. Based on the mathematical model of an FMC. we synthesized the controller by integrating a supervisor for FMC with control specification that specifies event-driven operation of the cell controller. The proposed control scheme is stable mathematically so that the system always behaves on a controlled way even under the existence of uncontrollable events. Furthermore, using an event queue concept, we can solve a synchronization problem caused by the violation of instantaneity assumption of supervisory control theory in real life situation. And also, we can propotype a control software rapidly due to the modularity of the proposed control scheme.

• Journal of Internet Computing and Services
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• v.24 no.5
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• pp.51-66
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• 2023

In this paper, we propose a new type of process discovery framework, which is named as control-path-driven process group discovery framework, to be used for process mining and process reengineering in supporting life-cycle management of business process models. In addition, we develop a process mining system based on the proposed framework and perform experimental verification through it. The process execution event logs applied to the experimental effectiveness and verification are specially defined as Process BIG-Logs, and we use it as the input datasets for the proposed discovery framework. As an eventual goal of this paper, we design and implement a control path-driven process group discovery algorithm and framework that is improved from the ρ-algorithm, and we try to verify the functional correctness of the proposed algorithm and framework by using the implemented system with a BIG-Log dataset. Note that all the process mining algorithm, framework, and system developed in this paper are based on the structural information control net process modeling methodology.

• Journal of the Korea Society for Simulation
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• v.1 no.1
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• pp.87-102
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• 1992

This paper presents the development of event-driven system level simulation tool SMPLE(Smpl Extende, an extention fo smpl) and its application to the performance analysis of multiprocessor computer systems. Because of its data structure, it is very difficult to change, expand or add new functions to simulation language smpl implemented by MacDougall. In SMPLE, we change data structure with structure and pointer, add new functions, and enable dynamic memory management. Using new data structure, facilities, and functions added in SMPLE, we simulate job processing of a shared bus multiprocessor system with autonomous hierarchical I/O subsystem. We set system performance contribution of subsystems and units. The impact of disk I/O on system performance is evaluated under vairous conditions of number of processors, processing power, memory access time and disk seek time.