• 한국분말재료학회지
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• 제20권2호
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• pp.120-124
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• 2013

This study is carried out to develop the new process for the fabrication of ultra-fine electrodes on the flexible substrates using superhydrophobic effect. A facile method was developed to form the ultra-fine trenches on the flexible substrates treated by plasma etching and to print the fine metal electrodes using conductive nano-ink. Various plasma etching conditions were investigated for the hydrophobic surface treatment of flexible polyimide (PI) films. The micro-trench on the hydrophobic PI film fabricated under optimized conditions was obtained by mechanical scratching, which gave the hydrophilic property only to the trench area. Finally, the patterning by selective deposition of ink materials was performed using the conductive silver nano-ink. The interface between the conductive nanoparticles and the flexible substrates were characterized by scanning electron microscope. The increase of the sintering temperature and metal concentration of ink caused the reduction of electrical resistance. The sintering temperature lower than $200^{\circ}C$ resulted in good interfacial bonding between Ag electrode and PI film substrate.

• 한국전기전자재료학회논문지
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• 제24권5호
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• pp.374-380
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• 2011

In this paper a printing process for patterning electrodes on large area substrate was developed by combining screen printing with reverse off-set printing. Ag ink was uniformly coated by screen printing. And then etching resist (ER) was patterned in the Ag film by reverse off-set printing, and then the non-desired Ag film was etched off by etchant. Finally, the ER was stripped-off to obtain the final Ag patterns. We extracted the suitable conditions of reverse Using the process we successfully fabricated gate electrodes and scan bus lines of OTFT-backplane used for e-paper, in which the diagonal size was 6 inch, the resolution $320{\times}240$, the minimum line width 30 um, and sheet resistance 1 ${\Omega}/{\Box}$.

• 전자공학회논문지A
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• 제30A권10호
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• pp.33-40
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• 1993

A reflection type 16x8 S-SEED array from LP(Low Pressure)-MODVD-grown GaAs/AlGaAs extremely shallow quantum well(ESQW) structures, with 4% Al fraction, has been fabricated. Its intrinsic region consists of 50 pairs of alternating 100.angs. GaAs and 100.angs. $Al_{0.04}$Ga$_{0.96}$As layers. A multilayer reflector stack of $Al_{0.04}$/Ga$_{0.96}$ As(599$\AA$)/AlAs(723$\AA$) was incorporated for the reflection plane below the p-i-n structures. The device processing after the MOCVD growth includes the mesa etching, isolation etching, insulator deposition, p & n metallization, and AR(Anti-Reflection) coating. For switching characteristics of the S-SEED in the form of p-i-n ESQW diode, the maximum optical negative resistance was observed at 856nm. Reflectance measurements showed a change from 15.6% to 43.3% for +0.9V to -6V bias. The maximum contrast ration of the S-SEED array was 2.0 and all the 128 devices showed optical bistability with contrast ratios over 2.4 at 5V reverse bias.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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• pp.232.2-232.2
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• 2014

Since its discovery in 2004, graphene, a sp2-hybridized 2-Dimension carbon material, has drawn enormous attention. A variety of approaches have been attempted, such as epitaxial growth from silicon carbide, chemical reduction of graphene oxide and CVD. Among these approaches, the CVD process takes great attention due to its guarantee of high quality and large scale with high yield on various transition metals. After synthesis of graphene on metal substrate, the subsequent transfer process is needed to transfer graphene onto various target substrates, such as bubbling transfer, renewable epoxy transfer and wet etching transfer. However, those transfer processes are hard to control and inevitably induce defects to graphene film. Especially for wet etching transfer, the metal substrate is totally etched away, which is horrendous resources wasting, time consuming, and unsuitable for industry production. Thus, our group develops one-step process to directly grow graphene on glass substrate in plasma enhanced chemical vapor deposition (PECVD). Copper foil is used as catalyst to enhance the growth of graphene, as well as a temperature shield to provide relatively low temperature to glass substrate. The effect of growth time is reported that longer growth time will provide lower sheet resistance and higher VSG flakes. The VSG with conductivity of $800{\Omega}/sq$ and thickness of 270 nm grown on glass substrate can be obtained under 12 min growing time. The morphology is clearly showed by SEM image and Raman spectra that VSG film is composed of base layer of amorphous carbon and vertically arranged graphene flakes.

• 한국재료학회지
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• 제23권6호
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• pp.322-328
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• 2013

The relationship the between electrical properties and surface roughness (Ra) of a wet-etched silicon wafer were studied. Ra was measured by an alpha-step process and atomic force microscopy (AFM) while varying the measuring range $10{\times}10$, $40{\times}40$, and $1000{\times}1000{\mu}m$. The resistivity was measured by assessing the surface resistance using a four-point probe method. The relationship between the resistivity and Ra was explained in terms of the surface roughness. The minimum error value between the experimental and theoretical resistivities was 4.23% when the Ra was in a range of $10{\times}10{\mu}m$ according to AFM measurement. The maximum error value was 14.09% when the Ra was in a range of $40{\times}40{\mu}m$ according to AFM measurement. Thus, the resistivity could be estimated when the Ra was in a narrow range.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1994년도 하계학술대회 논문집 C
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• pp.1268-1270
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• 1994

Fine lithographic technology in a submicron design regime is necessary for the fabrication of VLSI circuits. In such lithography, fine pattern delineation is performed by electron beam, ion beam and X-ray lithography instead of photolithography. Therefore, the new resist materials and development method have been required. So, we are investigating another positive E-beam resists which have high sensitivity and dry etching resistance, Plasma co-polymerized resist was prepared using an interelectrode gas-flow-type reacter. Methymethacrylate, tetramethyltin and styrene were chosen as the monomer to be used. The delineated pattern in the resist was developed with gas-flow-type reactor using an argon and 02 as etching gas. We studied about the effects of discharge power and mixing rate of the co-polymerized thin :film. The molecular structure of thin film was investigated by ESCA and IR, and then was discussed in relation to its quality as a resist.

• 한국세라믹학회지
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• 제46권5호
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• pp.441-446
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• 2009

Dense crack-free yttria film with 10 $\mu m$ thickness was prepared on aluminum by aerosol deposition. X-ray diffraction pattern on the film showed that it contained the same crystalline phase as the raw powder. Transmission electron microscopy revealed a nanostructured yttria film with grains smaller than 100 nm. Tensile adhesion strength between the film and aluminum substrate was 57.8 $\pm$ 6.3MPa. According to the etching test with $CF_4-O_2$ plasma, the etching rate of the yttria film was 1/100 that of quartz, 1/10 that of sintered alumina and comparable to that of sintered yttria.

• Journal of Magnetics
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• 제6권3호
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• pp.90-93
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• 2001

Co/$Al_O_3$/NiFe and CO/$Al_O_3$/Co tunnel junctions were fabricated by a radio frequency magnetron sputtering at room temperature with hard mask on glass and $4^{\circ}$ tilt cut Si (111) substrates. The barrier layer was formed through two steps. After the Al layer was deposited, it was oxidized in the chamber of a reactive ion etching system (RIE) with $O_2$plasma at various conditions. The dependence of the TMR value and junction resistance on the thickness of Al layer (before oxidation) and oxidation parameters were investigated. Magnetoresistance value of 7% at room temperature was obtained by optimizing the Al layer thickness and oxidation conditions. Circular shape junctions on $4^{\circ}$tilt cut Si (111) substrate showed 4% magnetoresistance. Photovoltaic energy conversion effect was observed with the cross-strip geometry junctions on Si substrate.

• 한국자기학회:학술대회 개요집
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• 한국자기학회 2011년도 자성 및 자성재료 국제학술대회
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• pp.29-30
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• 2011

We have demonstrated the fabrication of sub 30 nm MTJ pillars with PMA characteristics. The multi-step IBE process performed at $45^{\circ}$ and $30^{\circ}$, using NER resulted in almost vertical side profiles. There deposition on the sidewalls of the NER prevented lateral etching of the resist hard mask allowing vertical MTJ side profile formation without any reduction in the lithographically defined resist lateral dimensions. For the 28nm STT-MTJ pillars, the measured TMR ratio was 13 % with resistance of 1 $k{\Omega}$, which was due to remaining redeposition layers less than 0.1 nm thick. With further optimization in multi-step IBE conditions, it will be possible to fabricate fully operating sub 30 nm perpendicular STT-MTJ structures for application to future non-volatile memories.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2010년도 춘계학술대회
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• pp.795-797
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• 2010

습식 식각은 식각용액으로서 화학용액을 사용하는 공정으로 반응물이 기판표면에서 화학반응을 일으켜 표면을 식각하는 과정이며, 표면결합의 제거를 위한 식각연마와 폴리싱을 위한 식각, 그리고 구조적 형상 패턴등이 있다. 여기서 화학용액은 산화제 또는 환원제 역할을 하는 혼합용액으로 구성된다. 습식 식각 시 수${\mu}m$의 해상도를 얻기 위해서는 그 부식액의 조성이나, 에칭시간, 부식액의 온도 등을 고려하여야 한다. 또한 습식 식각 후 포토 레지스트를 제거하는 과정에서 포토 레지스트를 깨끗이 제거해야 하며, 제거공정 자체가 a-Si:H 박막을 부식 하지 않을 조건으로 행하여야 한다. 포토레지스트 제거 후 잔류 포토 레지스트를 제거하기 위해서 본 실험에서는 RCA-I 세척 기법을 사용한 후 D.I 로 린스 하였다. 본 실험에서 사용한 금속은 Cr, Al, ITO 로 모두 DC sputter 방법을 사용해서 증착하여 사용하였다. Cr박막은 $1300\AA$ 정도의 두께를 사용하였고, ITO (Indium Tin Oxide) 박막은 가시광 영역에서 투명하고 (80% 이상의 transmittance), 저저항 (Sheet Resistance : $50{\Omega}/sq$ 이하) 인 박막을 사용하였으며, 신호선으로 주로 사용되는 Al등의 증착조건에 따른 wet etching 특성을 조사하였다.