• 한국전기전자재료학회논문지
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• 제13권2호
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• pp.114-119
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• 2000

Etch characteristics of SF6/CI2 electron cyclotron resonance (ECR) plasmas have been investigated. Surface reaction of gas plasma with polysilicon was also analysed using X-ray photoelectron spectroscopy (XPS). At the same time, the relationship between surface reaction and the etched profile of polysilicon was examined using XPS. The etch rate of polysilicon and oxide increases with increasing flow rate of SF6 in the SF6/CI2 gas mixture, and tis selectivity also increase also increase. It was also found that as increasing flow rate of SF6 in the SF6/CI2 gas mixture, the atomic% of chlorine detected at surface region decrease, but F and S contents increase. At the same time, when the mixing ratio of SF6 gas increases, the anisotropy of etched polysilicon is sharply decreased in the 0%~10% range of the SF6 mixing ratio, but is rarely varied in the range over 10%, in spite of the large variations in flow rates. It can be explained that the bonding of S-Si due to SiSx(x$\leq$2) compound formed on the etched surface suppress the formation of Si-Cl and 'or Si-F bonding in the silicon etching.

• 한국전기전자재료학회논문지
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• 제14권2호
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• pp.93-98
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• 2001

YMnO$_3$ films are excellent gate dielectric materials of ferroelectric random access memories (FRAMs) with MFSFET (metal -ferroelectric-semiconductor field effect transistor) structure because YMnO$_3$ films can be deposited directly on Si substrate and have a relatively low permittivity. Although the patterning of YMnO$_3$ thin films is the requisite for the fabrication of FRAMs, the etch mechanism of YMnO$_3$ thin films has not been reported. In this study, YMnO$_3$thin films were etched with Cl$_2$/Ar gas chemistries in inductively coupled plasma (ICP). The maximum etch rate of YMnO$_3$ film is 285$\AA$/min under Cl$_2$/(Cl$_2$+Ar) of 1.0, RF power of 600 W, dc-bias voltage of -200V, chamber pressure of 15 mTorr and substrate temperature of $25^{\circ}C$. The selectivities of YMnO$_3$ over CeO$_2$ and $Y_2$O$_3$ are 2.85, 1.72, respectively. The selectivities of YMnO$_3$ over PR and Pt are quite low. Chemical reaction in surface of the etched YMnO$_3$ thin films was investigated with X-ray photoelectron spectroscopy (XPS) surface of the selected YMnO$_3$ thin films was investigated with X-ray photoelectron spectroscopy(XPS) and secondary ion mass spectrometry (SIMS). The etch profile was also investigated by scaning electron microscopy(SEM)

• 대한전자공학회논문지SD
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• 제37권7호
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• pp.1-6
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• 2000

본 연구에서는 Pt 박막을 식각하기 이하여 기존에 최적화된 가스 혼합비인 $Cl_2$(10)Ar (90)에 $N_2$ 가스를 첨가하기 실험하였다. $Cl_2$(10)/Ar(90)의 가스 혼합비에 20% $N_2$가스 첨가시, $SiO_2$ 마스크에 대한 Pt 박막의 선택비 향상으로 70$^{\circ}$ 이상의 식각 프로파일을 얻을 수 있었다. 이는 $SiO_2$ 마스크 위에 Si-N, Si-O-N과 같은 차단막 생성을 통한 결과로 확인 되어졌다. $SiO_2$ 마스크에 대한 Pt 박막의 최대 선택비와 식각률은 각각 1.71과 4125 ${\AA}$/min 이다. 이는 Pt-N, Pt-N-Cl과 같은 휘발성 화합물의 생성을 통한 결과로 판단된다.

• 한국전기전자재료학회논문지
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• 제14권12호
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• pp.959-964
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• 2001

We investigated the etching characteristics of YMnO$_3$ thin films in high-density plasma etching system. In this study, YMnO$_3$ thin films were etched with CF$_4$/Ar gas chemistries in inductively coupled plasma(ICP). Etch rates of YMnO$_3$ increased up to 20% CF$_4$ in CF$_4$/(CF$_4$+Ar), but decreased with furthermore increasing CF$_4$ in CF$_4$/(CF$_4$+Ar). In optical emission spectroscopy (OES) analysis, F radical and Ar* ions in plasma at various gas chemistries decreased with increasing CF$_4$ content. Chemical states of YMnO$_3$ films exposed in plasma were investigated with x-ray photoelectron spectroscopy (XPS) and secondary ion mass spectrometry (SIMS). There is a chemical reaction between metal (Y, Mn) and F and metal-fluorides were removed effectively by Ar ion sputtering. YF$_{x}$, MnF$_{x}$ such as YF, YF$_2$, YF$_3$ and MnF$_3$ were detected using SIMS analysis. The etch slope is about 65$^{\circ}$ and cleasn surface. surface of the etched YMnO$_3$ thin films was investigated with X-ray photoelectron spectroscopy (XPS) and secondary ion mass spectrometry (SIMS). The etch profile was also investigated by scanning electron microscopy (SEM).EM).

• 한국표면공학회지
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• 제48권6호
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• pp.360-370
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• 2015

As the size of the semiconductor devices shrinks to nanometer scale, the importance of plasma etching process to the fabrication of nanometer scale semiconductor devices is increasing further and further. But for the nanoscale devices, conventional plasma etching technique is extremely difficult to meet the requirement of the device fabrication, therefore, other etching techniques such as use of multi frequency plasma, source/bias/gas pulsing, etc. are investigated to meet the etching target. Until today, various pulsing techniques including pulsed plasma source and/or pulse-biased plasma etching have been tested on various materials. In this review, the experimental/theoretical studies of pulsed plasmas during the nanoscale plasma etching on etch profile, etch selectivity, uniformity, etc. have been summarized. Especially, the researches of pulsed plasma on the etching of silicon, $SiO_2$, and magnetic materials in the semiconductor industry for further device scaling have been discussed. Those results demonstrated the importance of pulse plasma on the pattern control for achieving the best performance. Although some of the pulsing mechanism is not well established, it is believed that this review will give a certain understanding on the pulsed plasma techniques.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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• pp.433-433
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• 2012

As the requirement in patterning geometry continuously shrinks down, the termination of etch process at the exact time became crucial for the success in nano patterning technology. By virtue of real-time optical emission spectroscopy (OES), etch end point detection (EPD) technique continuously develops; however, it also faced with difficulty in low open ratio etching, typically in self aligned contact (SAC) and one cylinder contact (OCS), because of very small amount of optical emission from by-product gas species in the bulk plasma glow discharge. In developing etching process, one may observe that coupon test is being performed. It consumes costs and time for preparing the patterned sample wafers every test in priority, so the coupon wafer test instead of the whole patterned wafer is beneficial for testing and developing etch process condition. We also can observe that etch open area is varied with the number of coupons on a dummy wafer. However, this can be a misleading in OES study. If the coupon wafer test are monitored using OES, we can conjecture the endpoint by experienced method, but considering by data, the materials for residual area by being etched open area are needed to consider. In this research, we compare and analysis the OES data for coupon wafer test results for monitoring about the conditions that the areas except the patterns on the coupon wafers for real-time process monitoring. In this research, we compared two cases, first one is etching the coupon wafers attached on the carrier wafer that is covered by the photoresist, and other case is etching the coupon wafers on the chuck. For comparing the emission intensity, we chose the four chemical species (SiF2, N2, CO, CN), and for comparing the etched profile, measured by scanning electron microscope (SEM). In addition, we adopted the Dynamic Time Warping (DTW) algorithm for analyzing the chose OES data patterns, and analysis the covariance and coefficient for statistical method. After the result, coupon wafers are over-etched for without carrier wafer groups, while with carrier wafer groups are under-etched. And the CN emission intensity has significant difference compare with OES raw data. Based on these results, it necessary to reasonable analysis of the OES data to adopt the pre-data processing and algorithms, and the result will influence the reliability for relation of coupon wafer test and whole wafer test.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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• pp.460-460
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• 2012

반도체 Device가 Shrink 함에 따라 Pattern Size가 작아지게 되고, 이로 인해 Photo Resist 물질 자체만으로는 원하는 Patterning 물질들을 Plasma Etching 하기가 어려워지고 있다. 이로 인해 Photoresist를 대체할 Hard Mask 개념이 도입되었으며, 이 Hardmask Layer 중 Amorphous Carbon Layer 가 가장 널리 사용되고 지고 있다. 이 Amorphous Carbon 계열의 Hardmask를 Etching 하기 위해서 기본적으로 O2 Plasma가 사용되는데, 이 O2 Plasma 내의 Oxygen Species들이 가지는 등 방성 Diffusion 특성으로 인해, 원하고자 하는 미세 Pattern의 Vertical Profile을 얻는데 많은 어려움이 있어왔다. 이를 Control 하기 인해 O2 Plasma Parameter들의 변화 및 Source/Bias Power 등의 변수가 연구되어 왔으며, 이와 다른 접근으로, N2 및 CO, CO2, SO2 등의 여러 Additive Gas 들의 첨가를 통해 미세 Pattern의 Profile을 개선하고, Plasma Etching 특성을 개선하는 연구가 같이 진행되어져 왔다. 본 논문에서 VLSI Device의 Masking Layer로 사용되는, Carbon 계 유기 층의 Plasma 식각 특성에 대한 연구를 진행하였다. Plasma Etchant로 사용되는 O2 Plasma에 새로운 첨가제 가스인 카르보닐 황화물 (COS) Gas를 추가하였을 시 나타나는 Plasma 내의 변화를 Plasma Parameter 및 IR 및 XPS, OES 분석을 통하여 규명하고, 이로 인한 Etch Rate 및 Plasma Potential에 대해 비교 분석하였다. COS Gas를 정량적으로 추가할 시, Plasma의 변화 및 이로 인해 얻어지는 Pattern에서의 Etchant Species들의 변화를 통해 Profile의 변화를 Mechanism 적으로 규명할 수 있었으며, 이로 인해 기존의 O2 Plasma를 통해 얻어진 Vertical Profile 대비, COS Additive Gas를 추가하였을 경우, Pattern Profile 변화가 개선됨을 최종적으로 확인 할 수 있었다.

• 한국전기전자재료학회논문지
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• 제18권5호
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• pp.389-395
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• 2005

The etching technology of the high aspect ratio contact(HARC) is necessary at the critical contact processes of semiconductor devices. Etching the $SiO_{2}$ contact hole with the sub-micron design rule in manufacturing VLSI devices, the unexpected phenomenon of 'profile tilting' or 'bottom distortion' is often observed. This makes a short circuit between neighboring contact holes, which causes to drop seriously the device yield. As the aspect ratio of contact holes increases, the high C/F ratio gases, $C_{4}F_{6}$, $C_{4}F_{8}$ and $C_{5}F_{8}$, become widely used in order to minimize the mask layer loss during the etching process. These gases provide abundant fluorocarbon polymer as well as high selectivity to the mask layer, and the polymer with high sticking yield accumulates at the top-wall of the contact hole. During the etch process, many electrons are accumulated around the asymmetric hole mouth to distort the electric field, and this distorts the ion trajectory arriving at the hole bottom. These ions with the distorted trajectory induce the deformation of the hole bottom, which is called 'profile tilting' or 'bottom distortion'. To prevent this phenomenon, three methods are suggested here. 1) Using lower C/F ratio gases, $CF_{4}$ or $C_{3}F_{8}$, the amount of the Polymer at the hole mouth is reduced to minimize the asymmetry of the hole top. 2) The number of the neighboring holes with equal distance is maximized to get the more symmetry of the oxygen distribution around the hole. 3) The dual frequency plasma source is used to release the excessive charge build-up at the hole mouth. From the suggested methods, we have obtained the nearly circular hole bottom, which Implies that the ion trajectory Incident on the hole bottom is symmetry.

• 반도체디스플레이기술학회지
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• 제5권2호
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• pp.47-49
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• 2006

Various methods of making thin film is being used in semiconductor manufacturing process. The most common method in this field includes CVD(Chemical Vapor Deposition) and PVD(Physical Vapor Deposition). Thin film is deposited on both the backside and the frontside of wafers. The thin film deposited on the backside has poor thickness profile, and can contaminate wafers in the following processes. If wafers with the thin film remaining on the backside are immersed in batch type process tank, the thin film fall apart from the backside and contaminate the nearest wafer. Thus, it is necessary to etch the backside of the wafer selectively without etching the frontside, and chemical injection nozzle positioned under the wafer can perform the backside etching. In this study, the backside chemical injection nozzle with optimized chemical injection profile is built for single wafer tool. The evaluation of this nozzle, performed on $Si_3N_4$ layer deposited on the backside of the wafer, shows the etching rate uniformity of less than 5% at the etching rate of more than $1000{\AA}$.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2004년도 추계학술대회 논문집 Vol.17
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• pp.666-670
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• 2004

VLSI 소자에서 design rule(D/R)이 작아져 각 단위 Pattern의 size가 작아짐에 따라 aspect ratio가 커지게 되었다. 산화막 contact etch를 하는데 있어 산화막 측벽을 보호하는데, 이러한 보호막은 주로 fluoro-carbon 계열의 polymer precursor들이 사용된다. Aspect ratio(A/R)가 5 이하일 때에는 측벽의 보호막에 의한 바닥 변형이 문제가 되지 않으나, 10 이상의 A/R를 가진 contact에서는 크기가 줄고, 모양이 불균형하게 변하는 바닥 변형을 쉴게 관찰할 수 있다. 이러한 바닥 변형이 커지면 contact 저항이 높아지는 것은 물론이고, 심하게는 하부 pattern과 overlap 불량을 유발할 수 있다. 본 논문에서는 바닥변형을 일으키는 원인을 분석하고 fluoro-carbon 계열의 polymer precursor의 종류$(C_4_F6\;vs.\;C_3F_8)$에 따른 polymer증착 상태 확인 및 pattern비대칭에 따른 바닥 변형의 고찰과 plasma etching 시 H/W 변형을 통해 바닥 변형이 거의 없는 조건을 찾아낼 수 있었다.