• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.18 no.11
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• pp.1262-1270
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• 2007

In this paper, we propose a new distortion cancellation mechanism for a balanced power amplifier structure using the carrier cancellation loop of a feedforward and post-distortion technique. The proposed cross post-distortion balanced linear amplifier can reduce nonlinear components as much as the conventional feedforward amplifier through the output dynamic range and broad bandwidth. Also the proposed system provides higher efficiency than the feedforward. The capacities of power amplifier and error power amplifier in the proposed system are analyzed and compared with those of feedforward amplifier. Also the operation mechanisms of the three kind loops are explained. The proposed cross post-distortion balanced linear power amplifier is implemented at the IMT-2000($f_0=2.14\;GHz$) band. With the commercial high power amplifiers of total power of 240 W peak envelope power fer base-station application, the adjacent channel leakage ratio measurement with wideband code division multiple access 4FA signal shows 18.6 dB improvement at an average output power of 40 dBm. The efficiency of fabricated amplifier Improves about 2 % than the conventional feedforward amplifier.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.36D no.1
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• pp.15-21
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• 1999

A new design of RF automatic gain control amplifier with low phase shift attenuator is proposed. By using the RF AGC amplifier, the output level of amplifier becomes to be constant. The error is 0.1dB. In addition, for arbitrary RF input power, it is possible to design the gain of amplifier to be fixed. If the constant gain is maintained, it is more reliable to make wanted IMD(Intermodulation Distortion) characteeristic amplifier.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.4
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• pp.318-330
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• 2013

This paper presents a high-linearity low-noise small-size programmable gain amplifier (PGA) based on a new low-noise low-distortion differential amplifier and a proposed reconfiguration technique. The proposed differential amplifier combines an inverter-based differential pair with an adaptive biasing circuit to reduce noise and distortion. The reconfiguration technique saves the chip size by half by utilizing the same differential pair for the input transconductance and load-stage, interchangeably. Fabricated in $0.18-{\mu}m$ CMOS, the proposed PGA shows a dB-linear control range of 21dB in 16 steps from -11 dB to 10 dB with a gain error of less than ${\pm}0.33$ dB, an IIP3 of 7.4~14.5 dBm, a P1dB of -7~1.2 dBm, a noise figure of 13dB, and a 3-dB bandwidth of 270MHz at the maximum gain, respectively. The PGA occupies a chip area of $0.04mm^2$ and consumes only 1.3 mA from the 1.8 V supply.

• JSTS:Journal of Semiconductor Technology and Science
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• v.11 no.4
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• pp.336-343
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• 2011

This paper introduces a simple variable gain amplifier (VGA) structure that shows an inherently dB-linear gain control property. Requiring no additional components for dB-linear control, the structure is compact and power efficient. The designed two-stage VGA shows a gain control range of 60dB with the gain error in the range of ${\pm}0.4$ dB. The power consumption including the output buffer is 20.4 mW from 1.2 V supply voltage with bandwidth of 630 MHz. The prototype was fabricated in a 0.13 ${\mu}m$ CMOS process and the VGA core occupies 0.06 $mm^2$.

• ETRI Journal
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• v.31 no.2
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• pp.234-236
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• 2009

We present a novel operational amplifier preset technique for a switched-capacitor circuit to reduce the acquisition time by improving the slewing. The acquisition time of a variable gain amplifier (VGA) using the proposed technique is reduced by 30% compared with a conventional one; therefore, the power consumption of the VGA is decreased. For additional power reduction, a programmable capacitor array scheme is used in the VGA. In the 0.13 ${\mu}m$ CMOS process, the VGA, which consists of three-stages, occupies 0.33 $mm^2$ and dissipates 19.2 mW at 60 MHz with a supply voltage of 1.2 V. The gain range is 36.03 dB, which is controlled by a 10-bit control word with a gain error of ${\pm}0.68$ LSB.

• Journal of Advanced Navigation Technology
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• v.6 no.4
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• pp.312-317
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• 2002

This paper presents a graphical design method for a low noise amplifier using the match circles plotted in the ${\Gamma}_{IN}$ plane on the smith chart. Each circle would be useful for reducing some trial and error efforts resulting from making a trade-off for an optimized performance of a single stage amplifier. A design example is presented to illustrate the design procedure.

• Journal of Advanced Navigation Technology
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• v.27 no.2
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• pp.197-202
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• 2023

This paper presents the design method and electrical characteristics of a high-efficiency power amplifier for a 50 Watts class repeater applied to a 5G system and used in in-building, subway, and tunnel. GaN was used for the termination transistor of the power amplifier designed here, and intermodulation signals were removed using DPD to satisfy linearity. In addition, in order to handle various requirements such as amplifier gain control and alarm processing required in the 5G system, the microprocessor is designed to exist inside the power amplifier. The amplifier manufactured to confirm the electrical performance of the power amplifier satisfying these conditions satisfied 46.5 dBm and the overall efficiency of the amplifier was 37%, and it was confirmed that it satisfied various alarm conditions and electrical characteristics required by telecommunication companies.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.23 no.6
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• pp.726-732
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• 2019

In this study, we proposed an asymmetric differential inductor to improve the linearity of differential power amplifiers. Considering the phase error between differential signals of the differential amplifier, the location of the center tap of the differential inductor was modified to minimize the error. As a result, the center tap was positioned asymmetrically inside the differential inductor. With the asymmetric differential inductor, the AM-to-AM and AM-to-PM distortions of the amplifier were suppressed. To confirm the feasibility of the inductor, we designed a 2.4 GHz differential CMOS PA for IEEE 802.11n WLAN applications with a 64-quadrature amplitude modulation (QAM), 9.6 dB peak-to-average power ratio (PAPR), and a bandwidth of 20 MHz. The designed power amplifier was fabricated using the 180-nm RF CMOS process. The measured maximum linear output power was 17 dBm, whereas EVM was 5%.

• Transactions on Electrical and Electronic Materials
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• v.14 no.5
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• pp.235-241
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• 2013

A low power CMOS control circuit is applied in an integrated DC-DC buck converter. The integrated converter is composed of a feedback control circuit and power block with 0.35 ${\mu}m$ CMOS process. A current-sensing circuit is integrated with the sense-FET method in the control circuit. In the current-sensing circuit, a current-mirror is used for a voltage follower in order to reduce power consumption with a smaller chip-size. The N-channel MOS acts as a switching device in the current-sensing circuit where the sensing FET is in parallel with the power MOSFET. The amplifier and comparator are designed to obtain a high gain and a fast transient time. The converter offers well-controlled output and accurately sensed inductor current. Simulation work shows that the current-sensing circuit is operated with an accuracy of higher than 90% and the transient time of the error amplifier is controlled within $75{\mu}sec$. The sensing current is in the range of a few hundred ${\mu}A$ at a frequency of 0.6~2 MHz and an input voltage of 3~5 V. The output voltage is obtained as expected with the ripple ratio within 1%.

• Journal of Satellite, Information and Communications
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• v.3 no.1
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• pp.15-21
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• 2008

The high peak to average power ratio (PAPR) of OFDM (Orthogonal Frequency Division Multiplexing) system introduces inevitable non-linear distortion in the transmission due to the amplifier non-linear property. This causes both in-band distortion and out of band spectrum re-growth. In this paper we tried to compensate the problem by using polynomial based pre-distortion. Estimation of both the non-linear and inverse non-linear polynomial is achieved using the Least Square Error (LSE) method. Using these parameters closed form pre-distorter can be easily created. We also used the 'partial peak cancellation and clipping' method to remove the high peak present in the non constant amplitude of the OFDM signal responsible to drive the amplifier in near saturation region for better performance of the system