• 제목/요약/키워드: Error Correction

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Exponentially Fitted Error Correction Methods for Solving Initial Value Problems

  • Kim, Sang-Dong;Kim, Phil-Su
    • Kyungpook Mathematical Journal
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    • 제52권2호
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    • pp.167-177
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    • 2012
  • In this article, we propose exponentially fitted error correction methods(EECM) which originate from the error correction methods recently developed by the authors (see [10, 11] for examples) for solving nonlinear stiff initial value problems. We reduce the computational cost of the error correction method by making a local approximation of exponential type. This exponential local approximation yields an EECM that is exponentially fitted, A-stable and L-stable, independent of the approximation scheme for the error correction. In particular, the classical explicit Runge-Kutta method for the error correction not only saves the computational cost that the error correction method requires but also gives the same convergence order as the error correction method does. Numerical evidence is provided to support the theoretical results.

선형 블록 오류정정코드의 구조와 원리에 대한 연구 (Study on Structure and Principle of Linear Block Error Correction Code)

  • 문현찬;갈홍주;이원영
    • 한국전자통신학회논문지
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    • 제13권4호
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    • pp.721-728
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    • 2018
  • 본 논문은 다양한 구조의 선형 블록 오류정정코드를 소개하고, 이를 회로로 구현하여 비교 분석한 결과를 보여주고 있다. 메모리 시스템에서는 잡음 전력으로 인한 비트 오류를 방지하기 위해 ECC(: Error Correction Code)가 사용되어 왔다. ECC의 종류에는 SEC-DED(: Single Error Correction Double Error Detection)와 SEC-DED-DAEC(: Double Adjacent Error Correction)가 있다. SEC-DED인 Hsiao 코드와 SEC-DED-DAEC인 Dutta, Pedro 코드를 각각 Verilog HDL을 이용해 설계 후 $0.35{\mu}m$ CMOS 공정을 사용해 회로로 합성하였다. 시뮬레이션에 의하면 SEC-DED회로는 인접한 두 개의 비트 오류를 정정하지 못하지만 적은 회로 사용면적과 빠른 지연 시간의 장점이 있으며, SEC-DED-DAEC 회로의 경우 Pedro 코드와 Dutta 코드 간에는 면적, 지연 시간의 차이가 없으므로 오류 정정률이 개선된 Pedro 코드를 사용하는 것이 더 효율적임을 알 수 있다.

Features of an Error Correction Memory to Enhance Technical Texts Authoring in LELIE

  • SAINT-DIZIER, Patrick
    • International Journal of Knowledge Content Development & Technology
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    • 제5권2호
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    • pp.75-101
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    • 2015
  • In this paper, we investigate the notion of error correction memory applied to technical texts. The main purpose is to introduce flexibility and context sensitivity in the detection and the correction of errors related to Constrained Natural Language (CNL) principles. This is realized by enhancing error detection paired with relatively generic correction patterns and contextual correction recommendations. Patterns are induced from previous corrections made by technical writers for a given type of text. The impact of such an error correction memory is also investigated from the point of view of the technical writer's cognitive activity. The notion of error correction memory is developed within the framework of the LELIE project an experiment is carried out on the case of fuzzy lexical items and negation, which are both major problems in technical writing. Language processing and knowledge representation aspects are developed together with evaluation directions.

오정정 없이 온칩 메모리 보호를 위한 SEC-DED-DAEC 부호 (SEC-DED-DAEC codes without mis-correction for protecting on-chip memories)

  • Jun, Hoyoon
    • 한국정보통신학회논문지
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    • 제26권10호
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    • pp.1559-1562
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    • 2022
  • As electronic devices technology scales down into the deep-submicron to achieve high-density, low power and high performance integrated circuits, multiple bit upsets by soft errors have become a major threat to on-chip memory systems. To address the soft error problem, single error correction, double error detection and double adjacent error correction (SEC-DED-DAEC) codes have been recently proposed. But these codes do not troubleshoot mis-correction problem. We propose the SEC-DED_DAEC code with without mis-correction. The decoder for proposed code is implemented as hardware and verified. The results show that there is no mis-correction in the proposed codes and the decoder can be employed on-chip memory system.

에러 보정 코드를 이용한 비동기용 대용량 메모리 모듈의 성능 향상 (Performance Improvement of Asynchronous Mass Memory Module Using Error Correction Code)

  • 안재현;양오;연준상
    • 반도체디스플레이기술학회지
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    • 제19권3호
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    • pp.112-117
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    • 2020
  • NAND flash memory is a non-volatile memory that retains stored data even without power supply. Internal memory used as a data storage device and solid-state drive (SSD) is used in portable devices such as smartphones and digital cameras. However, NAND flash memory carries the risk of electric shock, which can cause errors during read/write operations, so use error correction codes to ensure reliability. It efficiently recovers bad block information, which is a defect in NAND flash memory. BBT (Bad Block Table) is configured to manage data to increase stability, and as a result of experimenting with the error correction code algorithm, the bit error rate per page unit of 4Mbytes memory was on average 0ppm, and 100ppm without error correction code. Through the error correction code algorithm, data stability and reliability can be improved.

Error Control Strategy in Error Correction Methods

  • KIM, PHILSU;BU, SUNYOUNG
    • Kyungpook Mathematical Journal
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    • 제55권2호
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    • pp.301-311
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    • 2015
  • In this paper, we present the error control techniques for the error correction methods (ECM) which is recently developed by P. Kim et al. [8, 9]. We formulate the local truncation error at each time and calculate the approximated solution using the solution and the formulated truncation error at previous time for achieving uniform error bound which enables a long time simulation. Numerical results show that the error controlled ECM provides a clue to have uniform error bound for well conditioned problems [1].

음절 복원 알고리즘을 이용한 핵심어 오류 보정 시스템 (Key-word Error Correction System using Syllable Restoration Algorithm)

  • 안찬식;오상엽
    • 한국컴퓨터정보학회논문지
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    • 제15권10호
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    • pp.165-172
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    • 2010
  • 어휘 인식 시스템의 오류 보정방법으로는 오류 패턴매칭 기반 방법과 어휘의미 패턴 기반방법이있으며, 이들 방법에서는 오류 보정을 위해 핵심어를 의미적으로 분석하지 못하는 문제점을 가지고 있다. 이를 개선하기 위해 본 논문에서는 음절 복원 알고리즘을 이용한 핵심어 오류 보정 시스템을 제안한다. 인식된 음소 열을 의미 분석 과정을 거쳐 음소가 갖는 의미를 파악하고 음절 복원 알고리즘을 통해 음운 변동이 적용되기 이전의 문자열로 복원하므로 핵심어를 명확히 분석하고 오인식을 줄일 수 있다. 시스템 분석을 위해 음소 유사율과 신뢰도를 이용하여 오류 보정율을 구하였으며, 어휘 인식 과정에서 오류로 판명된 어휘에 대하여 오류 보정을 수행하였다. 에러 패턴 학습을 이용한 방법과 오류 패턴 매칭 기반 방법, 어휘 의미 패턴 기반 방법의 성능 평가 결과 3.0%의 인식 향상율을 보였다.

온칩 메모리 내 다중 비트 이상에 대처하기 위한 오류 정정 부호 (Error correction codes to manage multiple bit upset in on-chip memories)

  • Jun, Hoyoon
    • 한국정보통신학회논문지
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    • 제26권11호
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    • pp.1747-1750
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    • 2022
  • As shrinking the semiconductor process into the deep sub-micron to achieve high-density, low power and high performance integrated circuits, MBU (multiple bit upset) by soft errors is one of the major challenge of on-chip memory systems. To address the MBU, single error correction, double error detection and double adjacent error correction (SEC-DED-DAEC) codes have been recently proposed. But these codes do not resolve mis-correction. We propose the SEC-DED-DAEC-TAED(triple adjacent error detection) code without mis-corrections. The generated H-matrix by the proposed heuristic algorithm to accomplish the proposed code is implemented as hardware and verified. The results show that there is no mis-correction in the proposed codes and the 2-stage pipelined decoder can be employed on-chip memory system.

고밀도 디스크 드라이브의 서보트랙 기록오차 보정 알고리즘 (A New Correction Algorithm of Servo Track Writing Error in High-Density Disk Drives)

  • 강창익;김창환
    • 제어로봇시스템학회논문지
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    • 제9권4호
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    • pp.284-295
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    • 2003
  • The servo tracks of disk drives are constructed at the time of manufacture with the equipment of servo track writer. Because of the imperfection of servo track writer, disk vibrations and head fluctuations during servo track writing process, the constructed servo tracks might deviate from perfect circles and take eccentric shapes. The servo track writing error should be corrected because it might cause interference with adjacent tracks and irrecoverable operation error of disk drives. The servo track writing error is repeated every disk rotation and so is periodic time function. In this paper, we propose a new correction algorithm of servo track writing error based on iterative teaming approach. Our correction algorithm can learn iteratively the servo track writing error as accurately as is desired. Furthermore, our algorithm is robust to system model errors, is computationally simple, and has fast convergence rate. In order to demonstrate the generality and practical use of our work, we present the convergence analysis of our correction algorithm and some simulation results.

Automatic Adverb Error Correction in Korean Learners' EFL Writing

  • Kim, Jee-Eun
    • International Journal of Contents
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    • 제5권3호
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    • pp.65-70
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    • 2009
  • This paper describes ongoing work on the correction of adverb errors committed by Korean learners studying English as a foreign language (EFL), using an automated English writing assessment system. Adverb errors are commonly found in learners 'writings, but handling those errors rarely draws an attention in natural language processing due to complicated characteristics of adverb. To correctly detect the errors, adverbs are classified according to their grammatical functions, meanings and positions within a sentence. Adverb errors are collected from learners' sentences, and classified into five categories adopting a traditional error analysis. The error classification in conjunction with the adverb categorization is implemented into a set of mal-rules which automatically identifies the errors. When an error is detected, the system corrects the error and suggests error specific feedback. The feedback includes the types of errors, a corrected string of the error and a brief description of the error. This attempt suggests how to improve adverb error correction method as well as to provide richer diagnostic feedback to the learners.