• Title/Summary/Keyword: Erasable programmable Logic Device

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The Development of High Resolution Film Scanner Using DSP (DSP를 이용한 고해상도 스캐너 개발)

  • 김태현;최은석;백중환
    • Proceedings of the Korea Institute of Convergence Signal Processing
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    • 2000.12a
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    • pp.149-152
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    • 2000
  • A scanner is an output device that scans documents, photographs, films etc, and convert them to digital data. Especially, a film scanner is used for scanning negative/positive films. In this paper, we design step motor control part, image sensor part, and Aか converter part which are components of the scanner and use DSP for fast signal processing. We also design the interface circuits using EPLD between these peripherals and DSP. The PC interface circuits between scanner and PC are designed by using parallel port to control and transfer the scanned data from scanner to PC. For 35mm film, we design hardwares which obtain high resolution more than 9 million pixels (horizontal resolution is 3835 and vertical resolution is 2592).

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DESIGN CONCEPT FOR SINGLE CHIP MOSAIC CCD CONTROLLER

  • HAN WONYONG;JIN Ho;WALKER DAVID D.;CLAYTON MARTIN
    • Journal of The Korean Astronomical Society
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    • v.29 no.spc1
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    • pp.389-390
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    • 1996
  • The CCDs are widely used in astronomical observations either in direct imaging use or spectroscopic mode. However, the areas of available sensors are too small for large imaging format. One possibility to obtain large detection area is to assemble mosaics of CCD, and drive them simultaneously. Parallel driving of many CCDs together rules out the possibility of individual tuning; however, such optimisation is very important, when the ultimate low light level performance is required, particularly for new, or mixed devices. In this work, a new concept is explored for an entirely novel approach, where the drive waveforms are multiplexed and interleaved. This simultaneously reduces the number of leadout connections and permits individual optimisation efficiently. The digital controller can be designed within a single EPLD (Erasable Programmable Logic Device) chip produced by a CAD software package, where most of the digital controller circuits are integrated. This method can minimise the component. count., and improve the system efficiency greatly, based on earlier works by Han et a1. (1996, 1994). The system software has an open architecture to permit convenient modification by the user, to fit their specific purposes. Some variable system control parameters can be selected by a user with a wider range of choice. The digital controller design concept allows great flexibility of system parameters by the software, specifically for the compatibility to deal with any number of mixed CCDs, and in any format, within the practical limit.

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EPLD based Induction Motor Drives with a New Three-Phase Randomized Pulse Position PWM Scheme (새로운 3상 랜덤 펄스 위치 PWM기법에 의한 EPLD기반의 모터 속도제어 시스템)

  • Kim Hoe-Geun;Wi Seog-Oh;Lim Young-Cheol;Jung Young-Gook;Na Seok-Hwan
    • Proceedings of the KIPE Conference
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    • 2002.07a
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    • pp.308-312
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    • 2002
  • In this paper, EPLD(Erasable Programmable Logic Device) based induction motor drives with a SRP-PWM(Separatley Randomized Pulse Position PWM) is proposed. In the proposed RPWM (Random PWM), each of three phase pulses is located randomly in each switching interval. Based on the space vector modulation technique, the duty ratio of the pulses is calculated. To verify the validity of the proposed RPWM, the experimental study was tried. Along with the randomization of PWM pulses, the space vector modulation is also executed in the TMS320C31 DSP(Digital Signal Processor). The experimental results show that the voltage and switching noise harmonics are spread to a wide band area. Also, the performance of the proposed SRP-PWM and the conventional SVM-PWM are nearly the same from the viewpoing of the v/f constant control.

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