• Journal of Forest and Environmental Science
• /
• v.22 no.1
• /
• pp.41-49
• /
• 2006

The design instruction put in the wood structure construction manual of forest engineering works issued in Japan in 2004 is composed of the introduction, the use and characteristic of wood, investigation, planning, design, and etc. of wood structures. We analyzed the introduction, the use and characteristic of wood, investigation and planning for wood structures. By the results. the contents on the characteristic of wood are shown about physical and chemical properties of wood, the environmental influence, psychological and physiological effects, and rot of wood. The investigation items include the effective degree by flow and insolation, white ant's genital existence, flow conditions of surface water and ground water, situations of flora and fauna to live in mountain stream, the condition of water use, and etc. Also, the contents for the planning are explained for the structure, installation features. treatments, use of wood and lumber in the regions, preservative treatment, and etc.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.37 no.11
• /
• pp.74-84
• /
• 2000

This paper deals with procedures for design and implementation of a DSP, which is compatible with TMS320C30 DSP. CBS(Cycle Based Simulator) is developed to study the architecture of the target DSP. The simulator gives us detailed information such as function block operation, control signal values, register condition, bus and memory values when a instruction is being carried out. RTL design is carried out by VHDL. Logic simulation and hardware emulation are employed to verify proper operation of the design. The DSP is fabricated with 0.6${\mu}m$ CMOS technology. The Chip has 450,000 gates complexity, $9{\times}9mm^2$ area, 20 MIPS operation speed. It is confirmed by running 109 instructions out of 114 instructions and 13 kinds of algorithm that the developed DSP has compatibility with TMS320C30.

• Science of Emotion and Sensibility
• /
• v.14 no.4
• /
• pp.581-592
• /
• 2011

In this research, a study on a shopping web site design for elderly users is performed in order for them to purchase silver products easily. Issues discussed in this study are the menu design in the product-searching stage, the method of image placement and the method of instruction offering in the product-selecting stage, and the way of payment in the purchasing stage of products. Firstly, the present conditions of domestic shopping web sites for silver products were investigated and the evaluation models were designed and developed. With these developed models, a test group of 61 elderly users were given a task of searching for and purchasing a blood pressure gauge (sphygmomanameter). Afterwards, a comprehensive survey and an in-depth interview on their preferences concerning the web site design proposed. Based on the results of the preference study, a convenient and comfortable shopping web site design for elderly users is proposed when they purchase silver products through internet.

• Journal of IKEEE
• /
• v.19 no.1
• /
• pp.52-57
• /
• 2015

The disease diagnosis system has been developed using the thin nitride(Si3N4) cantilever arrays which can measure the difference of capacitances between sensor and reference. The system consists of 32-bits RISC(Reduced Instruction Set Computer), RAM/Flash, bus, communication IP's, ADC(Analog Digital Converter) board, and LCD display. The marker selection method, which give us the good accuracy from reasonal numbers of markers, is suggested. The developed system has the resolution under 1fF and can detect 10nM concentration of Thrombin.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.18 no.9
• /
• pp.2189-2196
• /
• 2014

In this paper, a VLIW(Very Long Instruction Word) vision coprocessor which can efficiently accelerate computer vision algorithm for automotive is designed. The VLIW coprocessor executes four instructions per clock cycle via 8-stage pipelined structure and has 36 integer and floating-point instructions to accelerate computer vision algorithm for pedestrian detection. The processor has about 300-MHz operating frequency and about 210,900 gates under 45nm CMOS technology and its estimated performance is 1.2 GOPS(Giga Operations Per Second). The vision system composed of vision primitive engine and eight VLIW coprocessors can execute pedestrian detection at 25~29 frames per second(FPS). Because the VLIW coprocessor has high detection rate and loosely coupled interface with host processor, it can be efficiently applicable to a wide range of vision applications.

• Journal of the Semiconductor & Display Technology
• /
• v.21 no.4
• /
• pp.27-32
• /
• 2022

RISC-V is an open instruction set architecture (ISA) developed in 2010 at UC Berkeley, and active research is being conducted as a processor to compete with ARM. In this paper, we propose an SoC system including an RV32I ISA-based 32-bit 5-stage pipeline processor and AHB bus master. The proposed RISC-V processor supports 37 instructions, excluding FENCE, ECALL, and EBREAK instructions, out of a total of 40 instructions based on RV32I ISA. In addition, the RISC-V processor can be connected to peripheral devices such as BRAM, UART, and TIMER using the AHB-lite bus protocol through the proposed AHB bus master. The proposed SoC system was implemented in Arty A7-35T FPGA with 1,959 LUTs and 1,982 flip-flops. Furthermore, the proposed hardware has a maximum operating frequency of 50 MHz. In the Dhrystone benchmark, the proposed processor performance was confirmed to be 0.48 DMIPS.

• Journal of the Korea Society of Computer and Information
• /
• v.16 no.5
• /
• pp.1-11
• /
• 2011

As the use of mobile multimedia devices is increasing in the recent year, the needs for high-performance multimedia processors are increasing. In this regard, we propose a SIMD (Single Instruction Multiple Data) based parallel processor that supports high-performance multimedia applications with low energy consumption. The proposed parallel processor consists of 16 processing elements (PEs) and operates on a 3-stage pipelining. Experimental results indicated that the proposed parallel processor outperforms conventional parallel processors in terms of performance. In addition, our proposed parallel processor outperforms commercial high-performance TI C6416 DSP in terms of performance (1.4-31.4x better) and energy efficiency (5.9-8.1x better) with same 130nm technology and 720 clock frequency. The proposed parallel processor was developed with verilog HDL and verified with a FPGA prototype system.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.37 no.12
• /
• pp.79-90
• /
• 2000

In this paper, a high-performance floating point unit, which is suitable for high-performance superscalar microprocessors and supports IEEE 754 standard, is designed. Floating-point arithmetic unit (AU) supports all denormalized number processing through hardware, while eliminating the additional delay time due to the denormalized number processing by proposing the proposed gradual underflow prediction (GUP) scheme. Contrary to the existing fixed-radix implementations, floating-point divide/square root unit adopts a new architecture which determines variable length quotient bits per cycle. The new architecture is superior to the SRT implementations in terms of performance and design complexity. Moreover, sophisticated exception prediction scheme enables precise exception to be implemented with ease on various superscalar microprocessors, and removes the stall cycles in division. Designed floating-point AU and divide/square root unit are integrated with and instruction decoder, register file, memory model and multiplier to form a floating-point unit, and its function and performance is verified.

• Journal of Engineering Education Research
• /
• v.10 no.1
• /
• pp.60-76
• /
• 2007

In this study, the effect of a sustainable energy design project on academic achievement for engineering freshmen at Virginia Tech in fall semester 2006 in the United States was examined by experimental method. The department of engineering education at Virginia Tech was opened in 2004. In this experiment the population was approximately 1200 freshmen, and 5 classes were sampled. Subject name is engineering exploration, a theme of the instruction is sustainable energy design, the project was performed throughout a 6 weeks period with one by 50 minutes lecture conducted by faculty and one 90 minutes workshop conducted by GTAs (Graduate Teaching Assistants) every week. The statistical results using SPSS (ver. 15.0) are as follows: A paired-samples t test analysis was run on the pre- and posttest to determine academic achievement, the results indicated a significant increase in 4 classes of mixed gender at .05 significance level, but there was no significance at 1 group of female class. A paired-samples t test analysis was run on the pre- and posttest to get an attitude score, the results showed, the posttest scores decreased for 5 groups even though it was not statistically significant. Finally, in responses to an open-ended question about students' perceptions of their improvement in skills, the 3 most frequently identified skills were teamwork, design process, knowledge.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2007.06a
• /
• pp.895-901
• /
• 2007

Currently the advancement of the computer and the Internet sees the direction of studying freely to do, it does not receive not to be, the student the environment it will be able to study oneself it is doing the direct help of the teacher and to be possible. Plan and it embodied the high school information society which it follows in 7th curriculum and the WBI of computer subject from the dissertation which it sees. In order to improve the qualify of curriculum ultimately, it endeavored. Territory it analyzes a subject contents first, especially it surveys, foundation it hardens, the actual training semester and pure with studying of self-evaluation do to become accomplished, studying oneself to sleep the possibility of doing own lead studying which is the possibility of studying spontaneously and integrated textbook studying in same tine it does to be with they are composing of the education paradigm the flag for a problem solving ability and an originality accident. In this dissertation used the php, Apache web server and the DBMS used the MySQL. To program member joining, the information society and computer curriculum take a course and test, it questions and, it is composed to data mourge. After taking a course, simultaneously lecturing a paper and online instruction, set up a foundation and quering that gratify one's curiosity thus it will be able to digest a study in once.