• Title/Summary/Keyword: Embedded memory

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Clinical Characteristics of Patients with Major Depressive Disorder on Military Service and Conscription Issues Using K-WAIS-IV : A Retrospective Study (한국판 성인용 웩슬러 지능검사 4판(K-WAIS-IV)으로 살펴본 병무용 진단서 대상 주요우울장애 환자의 특성 : 후향적 연구)

  • Kim, Jiyoung;Park, Eunhee
    • Anxiety and mood
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    • v.16 no.1
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    • pp.32-40
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    • 2020
  • Objective : The purpose of this study was to investigate the cognitive performance of major depressive disorder (MDD) in military service/conscription personnel who visited the psychiatric clinic for a medical certificate to consider the situation from the perspective of Korea's unique compulsory military system. We used the Korean Wechsler Adult Intelligence Scale-IV (K-WAIS-IV) as the test for verifying the suitable level of cognitive functioning for military service and as the embedded measure with reflecting suboptimal effort. Methods : The study was conducted on 56 (28 males, age 19-34) in/out-patients admitted to the psychiatry department and diagnosed with MDD (DSM-IV). All participants completed a structured clinical interview (MINI-Plus), as well as self-report questionnaires related to demographics and severity of clinical symptoms. K-WAIS-IV was administered to each subject to assess cognitive characteristics. Results : Military group showed significantly lower processing speed index (PSI) score including subtests of symbol search (SS) and coding (CD) score, compared to the control group. There was no other significant differences in the Full Scale IQ (FSIQ), Verbal Comprehension Index (VCI), Perceptual Reasoning Index (PRI), Working Memory Index (WMI) scores including sub-tests comprised of the above indices, and Reliable Digit Span (RDS), Enhanced-RDS-Revised (E-RDS-R) between the study and control groups. Conclusion : This study was the first effort to verify the characteristics of Korea's military group with MDD and suggest the applicability of PSI and processing speed of K-WAIS-IV as an embedded performance index to test sub-optimal effort or low motivation beyond the purpose of testing cognitive deficits.

Characterization of Electrical Properties of Si Nanocrystals Embedded in a SiO$_{2}$ Layer by Scanning Probe Microscopy (Scanning Probe Microscopy를 이용한 국소영역에서의 실리콘 나노크리스탈의 전기적 특성 분석)

  • Kim, Jung-Min;Her, Hyun-Jung;Kang, Chi-Jung;Kim, Yong-Sang
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.54 no.10
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    • pp.438-442
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    • 2005
  • Si nanocrystal (Si NC) memory device has several advantages such as better retention, lower operating voltage, reduced punch-through and consequently a smaller cell area, suppressed leakage current. However, the physical and electrical reasons for this behavior are not completely understood but could be related to interface states of Si NCs. In order to find out this effect, we characterized electrical properties of Si NCs embedded in a SiO$_{2}$ layer by scanning probe microscopy (SPM). The Si NCs were generated by the laser ablation method with compressed Si powder and followed by a sharpening oxidation. In this step Si NCs are capped with a thin oxide layer with the thickness of 1$\~$2 nm for isolation and the size control. The size of 51 NCs is in the range of 10$\~$50 m and the density around 10$^{11}$/cm$^{2}$ It also affects the interface states of Si NCs, resulting in the change of electrical properties. Using a conducting tip, the charge was injected directly into each Si NC, and the image contrast change and dC/dV curve shift due to the trapped charges were monitored. The results were compared with C-V characteristics of the conventional MOS capacitor structure.

Design and Implementation of eRTOS Real-time Operating Systems for Wearable Computers (웨어러블 컴퓨터를 위한 저전력 실시간 운영체제 eRTOS 설계 및 구현)

  • Cho, Moon-Haeng;Choi, Chan-Woo;Lee, Cheol-Hoon
    • The Journal of the Korea Contents Association
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    • v.8 no.9
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    • pp.42-54
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    • 2008
  • In recent years, embedded systems have been expanding their application domains from traditional embedded systems such as military weapons, robots, satellites and digital convergence systems such as celluar phones, PMP(Portable Multimedia Player), PDAs(Personal Digital Assistants) to Next Generation Personal Computers(NGPCs) such as eating PCs, wearable computers. The NGPCs are network-based, human-centric digital information devices diverged from the traditional PCs used mainly for document writing, internet searching and database management. Wearable computers with battery capacity and memory size limitations have to use real-time operating systems with small footprints and low power management techniques to provide user's QoS in spite of hardware constraints. In this paper, we have designed and implemented a low-power RTOS (called eRTOS) for wearable computers. The implemented eRTOS has 18KB footprints and the dynamic power management and the device power management schemes are adapted in it. Experimental results with wearable computer applications show that the low power techniques could save energy up to 47 %.

A Study on Development of H8 MCU IDB(Integrated development board) for Embedded Education (임베디드 기술 교육용 H8 MCU 통합개발보드 개발에 관한 연구)

  • Huh, Hyun;Lee, Jaehak
    • The Journal of the Korea institute of electronic communication sciences
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    • v.4 no.1
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    • pp.53-59
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    • 2009
  • By the use of open source and 16bit Microcomputer, IDB(Integrated Development Board) for embedded technical education was designed and developed. Based on 16bit MCU H8/300H, LED, LED Matrix, motors, sensors and various I/O circuitry, and the connection to a computer via the SCI, and $16{\times}2$ character LCD was designed and implemented on IDB. In addition, the software development environment was build by the assembler and H8 C compiler which is provided to the open-source software. And memory expansion was considered to include TRON(Real time OS) and uClinux. To verify the developed board, IDB was fabricated by PCB machine, and the fuction was confirmed by the basic I/O control program.

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High-Performance Line-Based Filtering Architecture Using Multi-Filter Lifting Method (다중필터 리프팅 방식을 이용한 고성능 라인기반 필터링 구조)

  • 서영호;김동욱
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.41 no.8
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    • pp.75-84
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    • 2004
  • In this paper, we proposed an efficient hardware architecture of line-based lifting algorithm for Motion JPEG2000. We proposed a new architecture of a lifting-based filtering cell which has an optimized and simplified structure. It was implemented in a hardware accommodating both (9,7) and (5,4) filter. Since the output rate is linearly proportional to the input rate, one can obtain the high throughput through parallel operation simply by adding the hardware units. It was implemented into both of ASIC and FPGA The 0.35${\mu}{\textrm}{m}$ CMOS library from Samsung was used for ASIC and Altera was the target for FRGA. In ASIC, the proposed architecture used 41,592 gates for the lifting arithmetic and 128 Kbit memory. For FPGA it used 6,520 LEs(Logic Elements) and 128 ESBs(Embedded System Blocks). The implementations were stably operated in the clock frequency of 128MHz and 52MHz, respectively.

Development of a Remote Interactive Shell for RTOS (RTOS 용 원격 대화형쉘 설계 및 구현)

  • Kim, Dae-Hui;Nam, Yeong-Gwang;Kim, Heung-Nam;Lee, Gwang-Yong
    • The KIPS Transactions:PartD
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    • v.9D no.4
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    • pp.677-686
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    • 2002
  • Recently, the Open-Development-Tool-Environment becomes a basic requirement of RTOS (Real Time Operating System) for embedded systems with restricted memory and CPU power in order to develop applications effectively. A remote interactive shell is one of the basic software components which makes users develop, test and control softwares without burdening target systems. In this paper, we have implemented the remote interactive shell with the following functions : loading object modules, spawning and manipulating tasks facilities thru a remote host. Comparing information reference methods with nonredundant overhead, we have achieved the system with easy maintenance. The shell has been developed with Q-PLUS RTOS under ARM EBSA285 target board and NT host.

Design and Implementation of Flash Translation Layer with O(1) Crash Recovery Time (O(1) 크래시 복구 수행시간을 갖는 FTL의 설계와 구현)

  • Park, Joon Young;Park, Hyunchan;Yoo, Chuck
    • KIISE Transactions on Computing Practices
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    • v.21 no.10
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    • pp.639-644
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    • 2015
  • The capacity of flash-based storage such as Solid State Drive(SSD) and embedded Multi Media Card(eMMC) is ever-increasing because of the needs from the end-users. However, if a flash-based storage crashes, such as during power failure, the flash translation layer(FTL) is responsible for the crash recovery based on the entire flash memory. The recovery time increases as the capacity of the flash-based storages increases. We propose O1FTL with O(1) crash recovery time that is independent of the flash capacity. O1FTL adopts the working area technique suggested for the flash file system and evaluates the design on a real hardware platform. The results show that O1FTL achieves a crash recovery time that is independent of the capacity and the overhead, in terms of I/O performance, and achieves a low P/E cycle.

Ultra low-power active wireless sensor for structural health monitoring

  • Zhou, Dao;Ha, Dong Sam;Inman, Daniel J.
    • Smart Structures and Systems
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    • v.6 no.5_6
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    • pp.675-687
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    • 2010
  • Structural Health Monitoring (SHM) is the science and technology of monitoring and assessing the condition of aerospace, civil and mechanical infrastructures using a sensing system integrated into the structure. Impedance-based SHM measures impedance of a structure using a PZT (Lead Zirconate Titanate) patch. This paper presents a low-power wireless autonomous and active SHM node called Autonomous SHM Sensor 2 (ASN-2), which is based on the impedance method. In this study, we incorporated three methods to save power. First, entire data processing is performed on-board, which minimizes radio transmission time. Considering that the radio of a wireless sensor node consumes the highest power among all modules, reduction of the transmission time saves substantial power. Second, a rectangular pulse train is used to excite a PZT patch instead of a sinusoidal wave. This eliminates a digital-to-analog converter and reduces the memory space. Third, ASN-2 senses the phase of the response signal instead of the magnitude. Sensing the phase of the signal eliminates an analog-to-digital converter and Fast Fourier Transform operation, which not only saves power, but also enables us to use a low-end low-power processor. Our SHM sensor node ASN-2 is implemented using a TI MSP430 microcontroller evaluation board. A cluster of ASN-2 nodes forms a wireless network. Each node wakes up at a predetermined interval, such as once in four hours, performs an SHM operation, reports the result to the central node wirelessly, and returns to sleep. The power consumption of our ASN-2 is 0.15 mW during the inactive mode and 18 mW during the active mode. Each SHM operation takes about 13 seconds to consume 236 mJ. When our ASN-2 operates once in every four hours, it is estimated to run for about 2.5 years with two AAA-size batteries ignoring the internal battery leakage.

Case Study on AUTOSAR Software Functional Safety Mechanism Design: Shift-by-Wire System (AUTOSAR 소프트웨어 기능안전 메커니즘 설계 사례연구: Shift-by-Wire 시스템)

  • Kum, Daehyun;Kwon, Soohyeon;Lee, Jaeseong;Lee, Seonghun
    • IEMEK Journal of Embedded Systems and Applications
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    • v.16 no.6
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    • pp.267-276
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    • 2021
  • The automotive industry and academic research have been continuously conducting research on standardization such as AUTOSAR (AUTomotive Open System ARchitecture) and ISO26262 to solve problems such as safety and efficiency caused by the complexity of electric/electronic architecture of automotive. AUTOSAR is an automotive standard software platform that has a layered structure independent of MCU (Micro Controller Unit) hardware, and improves product reliability through software modularity and reusability. And, ISO26262, an international standard for automotive functional safety and suggests a method to minimize errors in automotive ECU (Electronic Control Unit)s by defining the development process and results for the entire life cycle of automotive electrical/electronic systems. These design methods are variously applied in representative automotive safety-critical systems. However, since the functional and safety requirements are different according to the characteristics of the safety-critical system, it is essential to research the AUTOSAR functional safety design method specialized for each application domain. In this paper, a software functional safety mechanism design method using AUTOSAR is proposed, and a new failure management framework is proposed to ensure the high reliability of the product. The AUTOSAR functional safety mechanism consists of memory partitioning protection, timing monitoring protection, and end-to-end protection. The fault management framework is composed of several safety SWCs to maintain the minimum function and performance even if a fault occurs during the operation of a safety-critical system. Finally, the proposed method is applied to the Shift-by-Wire system design to prove the validity of the proposed method.

Design and Implementation of Secure UART based on Digital Signature and Encryption (디지털 서명과 암호화 기반 보안 UART의 설계와 구현)

  • Kim, Ju Hyeon;Joo, Young Jin;Hur, Ara;Cho, Min Kyoung;Ryu, Yeon Seung;Lee, Gyu Ho;Jang, Woo Hyun;Yu, Jae Gwan
    • Convergence Security Journal
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    • v.21 no.2
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    • pp.29-35
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    • 2021
  • UART (Universal asynchronous receiver/transmitter) is a hardware device that converts data into serial format and transmits it, and is widely used for system diagnosis and debugging in most embedded systems. Hackers can access system memory or firmware by using the functions of UART, and can take over the system by acquiring administrator rights of the system. In this paper, we studied secure UART to protect against hacker attacks through UART. In the proposed scheme, only authorized users using the promised UART communication protocol are allowed to access UART and unauthorized access is not allowed. In addition, data is encrypted and transmitted to prevent protocol analysis through sniffing. The proposed UART technique was implemented in an embedded Linux system and performance evaluation was performed.