• 대한기계학회논문집A
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• 제36권5호
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• pp.523-528
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• 2012

이동용 전자기기에 적용 가능한 유연성 전자모듈이 롤투롤 공정에 의해 개발되었다. 개발된 전자 모듈은 최 외곽의 두 폴리이미드 층과 그 사이의 동선과 이방성도전필름과 박막 실리콘 칩과 모듈의 봉지재 역할을 하는 접착재료로 구성된다. 개발된 유연성 전자모듈의 신뢰성을 평가하기 위하여 열충격시험, 고온고습 시험, 오토클레이브 시험을 수행하였다. 시험수행 결과 두 시험에서는 문제가 발생하지 않았으나, 오토클레이브 시험에서는 대부분의 시편 모듈 내에 박리가 발생하였다. 발생한 박리의 고장 메커니즘을 연구하기 위하여 봉지재의 흡습 관련 물성치를 실험적으로 분석하고 오토클레이브 시험조건에서의 모듈 내 습기확산과정을 범용 유한요소 프로그램을 이용하여 분석하였다. 해석결과로부터 오토클레이브 시험조건에서 모듈 내에 발생하는 습기확산과정을 밝혀낼 수 있었다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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• pp.196-196
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• 2012

Graphene, two-dimensional one-atom-thick planar sheet of carbon atoms densely packed in a honeycomb crystal lattice, has grabbled appreciable attention due to its extraordinary mechanical, thermal, electrical, and optical properties. Based on the graphene's high carrier mobility, high frequency graphene field effect transistors have been developed. Graphene is useful for photonic components as well as for the applications in electronic devices. Graphene's unique optical properties allowed us to develop ultra wide-bandwidth optical modulator, photo-detector, and broadband polarizer. Graphene can support SPP-like surface wave because it is considered as a two-dimensional metal-like systems. The SPPs are associated with the coupling between collective oscillation of free electrons in the metal and electromagnetic waves. The charged free carriers in the graphene contribute to support the surface waves at the graphene-dielectric interface by coupling to the electromagnetic wave. In addition, graphene can control the surface waves because its charge carrier density is tunable by means of a chemical doping method, varying the Fermi level by applying gate bias voltage, and/or applying magnetic field. As an extended application of graphene in photonics, we investigated the characteristics of the graphene-based plasmonic waveguide for optical signal transmission. The graphene strips embedded in a dielectric are served as a high-frequency optical signal guiding medium. The TM polarization wave is transmitted 6 mm-long graphene waveguide with the averaged extinction ratio of 19 dB at the telecom wavelength of $1.31{\mu}m$. 2.5 Gbps data transmission was successfully accomplished with the graphene waveguide. Based on these experimental results, we concluded that the graphene-based plasmonic waveguide can be exploited further for development of next-generation integrated photonic circuits on a chip.

• Journal of Biosystems Engineering
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• 제28권1호
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• pp.53-58
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• 2003

This study was carried out to design, construct, and test a greenhouse monitoring system fur the environment and status of control devices in a greenhouse from a remote site using internet. The measuring items selected out of many environmental factors were temperature, humidity, solar radiation, CO$_2$, SOx, NOx concentration, EC, pH of nutrient solution, the state of control devices, and the image of greenhouse. The developed greenhouse monitoring system was composed of the network system and the measuring module. The network system consists of the three kinds of monitors named the Croup Monitor. the Client Monitor and the Server Monitor. The results of the study are summarized as follows. 1. The measuring module named the House Monitor. which is used to watch the state of the control device and the environment of the greenhouse, was developed to a embedded monitoring module using one chip microprocessor 2. For all measuring items. the House Monitor showed a satisfactory accuracy within the range of ${\pm}$0.3%FS. The House Monitors were connected to the Croup Monitor by communication method of RS-485 type and could operate under power and communication fault condition within 10 hours. The Croup Monitor was developed to receive and display measurement data received from the House Monitors and to control the greenhouse environmental devices. 3. The images of the plants inside greenhouse were captured by PC camera and sent to the Group Monitor. The greenhouse manager was able to monitor the growth state of plants inside greenhouse without visiting individual greenhouses. 4. Remote monitoring the greenhouse environment and status of control devices was implemented in a client/server environment. The client monitor of the greenhouse manager at a remote site or other greenhouse manager was able to monitor the greenhouse environment and the state of control devices from the Server Monitor using internet.

• 인터넷정보학회논문지
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• 제8권4호
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• pp.51-59
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• 2007

본 논문에서는 RFID 기술 중 리더와 태그간 900MHz 대역을 사용하여 교육용 시스템 설계를 제시하였다. 능동형 태그와 리더의 설계를 임베디드 환경에서 제시하였으며 리더와 접속 가능한 서버의 소프트웨어 개발은 PC 윈도우 운영체제 환경에서 실현하였다. 개발 환경으로는 AT89C51ED2가 리더와 태그의 프로세서로, 개발 언어는 C 언어로, 이를 제어하기 위하여 케일 C 컴파일러가 사용되었다. 서버인 PC에서는 비쥬얼 스튜디오상의 비주얼 C 언어가 사용되었다. 시스템의 기능 점검을 위하여 PC에서는 리더를 통해 태그 주소를 인지하고, 메모리에 데이터를 읽고 쓰는 기능을 첨가하여 900MHz 대역의 RFID 교육용 소프트웨어 시스템을 구성하였다.

• 대한전자공학회논문지SD
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• 제44권9호
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• pp.40-47
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• 2007

제한적인 자원을 갖는 임베디드 시스템을 위한 영상처리 하드웨어 설계 시 메모리의 효율적인 구성은 필수적으로 고려할 사항이다. 특히 필터를 이용한 얼굴 검출 하드웨어는 필터와 입력영상을 저장하기 위해 많은 양의 메모리가 소요되기 때문에 효율적인 메모리 구성이 필요하다. 따라서 본 논문은 일반적인 필터방식의 알고리즘을 하드웨어 설계에 적절하도록 보완하여 하드웨어로 설계하였다. 설계된 하드웨어는 알고리즘 특성에 맞추어 적은 양의 내부 메모리를 사용하면서 한번 외부 메모리로부터 읽은 데이터를 다시 읽지 않도록 구성하였고, 데이터 양이 많아 외부 메모리에 저장되어 있는 필터를 효율적으로 사용하기 위해 필터의 일부를 내부 메모리로 복사하는 구조로 설계하였다. 또한 빠른 연산을 위해 여러 클럭이 소모되는 데이터 패스를 파이프라인 구조를 적용하여 연속적으로 메모리 데이터를 읽을 수 있는 구조로 설계하였다. 본 하드웨어는 xilinx 및 ARM 기반의 FPGA 환경에서 검증한 결과 1초에 25 프레임 처리가 가능하며 40KB의 내부 메모리를 사용하였고 삼성 0.18um공정을 이용하여 칩으로 제작 중이다.

• 한국정보통신학회논문지
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• 제8권4호
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• pp.826-832
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• 2004

본 논문에서는 VLSI의 내장 회로로 사용하기에 적합한 CMOS 8 비트 폴딩-인터폴레이팅 AD 변환기를 설계하였다. 폴딩 AD 변환기의 비선형성을 개선하기 위하여 입력신호의 폴딩-인터폴레이팅에 의한 신호처리가 차례로 2 번 반복되는 2 단 구조를 사용하였다. 이 구조에서는 2 번째 폴딩 회로로서 트랜지스터 차동쌍을 이용한다. 2 단 폴딩 ADC는 디지틸 출력을 얻기 위한 전압비교기와 저항의 개수를 현저히 줄일 수 있으므로 칩 면적, 소비전력, 동작속도 둥에서 많은 장점을 제공한다. 설계공정은 0.25$\mu$m double-poly 2 metal n-well CMOS 공정을 사용하였다. 모의실험결과 2.5V 전원 전압을 인가하고 250MHz의 샘플링 주파수에서 45mW의 전력을 소비하였으며 INL과 DNL은 각 각 $\pm$0.2LSB, SNDR은 10MHz 입력신호에서 45dB로 측정되었다.

• 방송공학회논문지
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• 제8권4호
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• pp.437-451
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• 2003

With the rapid growth of internet technologies and wide availability of multimedia computing facilities, the enforcement of multimedia copyright protection becomes an important issue. Digital watermarking is viewed as an effective way to deter content users from illegal distributions. In recent years, digital watermarking has been intensively studied to achieve this goal. However, when the watermarked media is transmitted over the channels modeled as the additive white Gaussian noise (AWGN) channel, the watermark information is often interfered by the channel noise and produces a large number of errors. So many error-correcting codes have been applied in the digital watermarking system to protect the embedded message from the disturbance of the noise, such as BCH codes, Reef-Solomon (RS) codes and Turbo codes. Recently, low-density parity-check (LDPC) codes were demonstrated as good error correcting codes achieving near Shannon limit performance and outperforming turbo codes nth low decoding complexity. In this paper, in order to mitigate the channel conditions and improve the quality of watermark, we proposed the application of LDPC codes on implementing a fairly robust digital image watermarking system. The implemented watermarking system operates in the spectrum domain where a subset of the discrete wavelet transform (DWT) coefficients is modified by the watermark without using original image during watermark extraction. The quality of watermark is evaluated by taking Into account the trade-off between the chip-rate and the rate of LDPC codes. Many simulation results are presented in this paper, these results indicate that the quality of the watermark is improved greatly and the proposed system based on LDPC codes is very robust to attacks.

• 한국정보통신학회논문지
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• 제6권5호
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• pp.703-717
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• 2002

본 논문은 가변형 공유 버퍼 ATM 스위치의 구조 및 VLSI 구현에 관한 연구이다. 본 논문에서 설계한 단일 칩 공유 버퍼 ATM 스위치는 4ns접근속도의 가변형 파이프라인 방식 공유 버퍼를 내장하고 기존의 공유 버퍼 ATM 스위치들이 가지는 메모리 사이클 시간 제한을 해결한다. 내장 버퍼의 가변성을 이용하여 유연한 스위칭 성능을 지원하고 버퍼 메모리 제어와 주소 큐 제어의 독립성을 이용하여 포트 사이즈의 가변성을 제공한다. 제안된 ATM 스위치는 스위치 사이즈와 버퍼 사이즈의 가변성을 이용하여 복잡한 회로의 재설계 없이 용량 및 성능을 재구성할 수 있다. 0.6um CMOS 기술의 설계된 칩은 동작 주파수 800MHz, 640Mbps/port, 4 ${\times}$ 4 Switch Size를 지원한다.

• 한국펄프종이공학회:학술대회논문집
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• 한국펄프종이공학회 2006년도 PAN PACIFIC CONFERENCE vol.2
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• pp.305-309
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• 2006

This paper presents and illustrates the application of a growth and yield model that supports both forest and mill side volume and value estimates. Traditional forest stand growth and yield models represent the forest landowner view of yield and economics. Predicted yields are estimates of what one would expect from a procurement cruise, and current stumpage prices are applied to investigate optimum management strategies. Optimum management regimes and rotation ages obtained from the forest side view are unlikely to be economically optimal when viewed from the mill side. The actual distribution of recoverable manufactured product and its value are highly dependent on mill technologies and configurations. Overcoming this limitation of growth and yield computer models necessitates the ability to predict and price the expected manufactured distribution of lumber, lineal meters of veneer, and tonnes of air dried pulp fiber yield. With these embedded models, users of the yield simulator can evaluate the economics of possible/feasible management regimes from both the forest and mill business sides. The simulator is a forest side model that has been modified to produce estimates of manufactured product yields by embedding models for 1) pulpwood chip size class distribution and pulp yield for any kappa number (Schultz and Matney, 2002), 2) a lumber yield and pricing model based on the Best Opening Face model developed by the USDA Forest Service Forest Products Laboratory (Lewis, 1985a and Lewis, 1985b), and 3) a lineal meter veneer model derived from peeler block tests. While the model is strictly applicable to planted loblolly pine (Pinus taeda L.) on cutover site-prepared land in the United States (US) Gulf South, the model and computer program are adaptable to any region and forest type.

• 전자통신동향분석
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• 제38권6호
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• pp.41-51
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• 2023

Heat dissipation technology for semiconductors and electronic packaging has a substantial impact on performance and lifespan, but efficient heat dissipation is currently facing limited improvement. Owing to the high integration density in electronic packaging, heat dissipation components must become thinner and increase their performance. Therefore, heat dissipation materials are being devised considering conductive heat transfer, carbon-based directional thermal conductivity improvements, functional heat dissipation composite materials with added fillers, and liquid-metal thermal interface materials. Additionally, in heat dissipation structure design, 3D printing-based complex heat dissipation fins, packages that expand the heat dissipation area, chip embedded structures that minimize contact thermal resistance, differential scanning calorimetry structures, and through-silicon-via technologies and their replacement technologies are being actively developed. Regarding dry cooling using single-phase and phase-change heat transfer, technologies for improving the vapor chamber performance and structural diversification are being investigated along with the miniaturization of heat pipes and high-performance capillary wicks. Meanwhile, in wet cooling with high heat flux, technologies for designing and manufacturing miniaturized flow paths, heat dissipating materials within flow paths, increasing heat dissipation area, and reducing pressure drops are being developed. We also analyze the development of direct cooling and immersion cooling technologies, which are gradually expanding to achieve near-junction cooling.