• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.12
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• pp.73-79
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• 2009

With the advance of VLSI technology, the capacity and density of memories are rapidly growing. In this paper we proposed MRI (Memory built-in self Repair Imagination zone) as reallocation algorithm. All faulty cells of embedded memory are reallocated into the row and column spare memory. This work implements reallocation algorithm and BISR to verify its design.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.2
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• pp.113-120
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• 2007

With the advance of VLSI technology, the capacity and density of memories is rapidly growing. In this paper we proposed reallocation algorithm. All faulty cell of embedded memory is reallocated into the row and column spare memory. This work implements reallocation algorithm and BISR to verify its design.

• Journal of the Korea Society of Computer and Information
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• v.21 no.2
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• pp.33-42
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• 2016

In this paper, an advanced reversible data hiding algorithm which takes the advantage of the spatial locality in image was proposed. Natural image has a spatial locality. The pixel value of a natural image is similar to the values of neighboring pixels. So, using the neighboring pixel values, it is possible to precisely predict the pixel value. Frequency increases significantly at the peak point of the difference histogram using the predicted values. Therefore, it is possible to increase the amount of data to be embedded. By using the proposed algorithm, visually high quality stego-image can be generated, the original cover image and the embedded data can be extracted from the stego-image without distortion. The embedding data into the cover image of the proposed algorithm is much lager than that of the previous algorithm. The performance of the proposed algorithm was verified by experiment. The proposed algorithm is very useful for the reversible data hiding.

• The KIPS Transactions:PartA
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• v.9A no.4
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• pp.405-412
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• 2002

The embedded system has less fast CPU and lower memory than PC(personal Computer) or Workstation system. Therefore embedded operating is system is designed to efficiently use the limited resource in the system. Virtual memory management or the embedded linux have a low efficiency when page fault is occurred to get a data from I/O device. Because a data is moving from the swap device to main memory. This paper suggests virtual memory compression algorithm for improving in virtual memory management and capacity of space. In this paper, we present a way to performance implement a virtual memory compression system that achieves significant improvement for the embedded system.

• IEMEK Journal of Embedded Systems and Applications
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• v.14 no.5
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• pp.277-286
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• 2019

In this paper, we propose an efficient hyperplane generation technique to classify human activity from combination of events and sequence information obtained from multiple-event sensors. By generating hyperplane efficiently, our machine learning algorithm classify with less memory and run time than the LSVM (Linear Support Vector Machine) for embedded system. Because the fact that light weight and high speed algorithm is one of the most critical issue in the IoT, the study can be applied to smart home to predict human activity and provide related services. Our approach is based on reducing numbers of hyperplanes and utilizing robust string comparing algorithm. The proposed method results in reduction of memory consumption compared to the conventional ML (Machine Learning) algorithms; 252 times to LSVM and 34,033 times to LSTM (Long Short-Term Memory), although accuracy is decreased slightly. Thus our method showed outstanding performance on accuracy per hyperplane; 240 times to LSVM and 30,520 times to LSTM. The binarized image is then divided into groups, where each groups are converted to binary number, in order to reduce the number of comparison done in runtime process. The binary numbers are then converted to string. The test data is evaluated by converting to string and measuring similarity between hyperplanes using Levenshtein algorithm, which is a robust dynamic string comparing algorithm. This technique reduces runtime and enables the proposed algorithm to become 27% faster than LSVM, and 90% faster than LSTM.

• ETRI Journal
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• v.27 no.5
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• pp.491-496
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• 2005

An application specific processor for an H.264 decoder with a configurable embedded processor is designed in this research. The motion compensation, inverse integer transform, inverse quantization, and entropy decoding algorithm of H.264 decoder software are optimized. We improved the performance of the processor with instruction-level hardware optimization, which is tailored to configurable embedded processor architecture. The optimized instructions for video processing can be used in other video compression standards such as MPEG 1, 2, and 4. A significant performance improvement is achieved with high flexibility. Experimental results show that we could achieve 300% performance for the H.264 baseline profile level 2 decoder.

• Journal of Korea Multimedia Society
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• v.19 no.10
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• pp.1759-1766
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• 2016

We can implement the virtual touch recognition system by mounting the virtual touch algorithm into an embedded device connected to a depth camera. Since the computing performance is limited in embedded system, the real-time processing of recognizing the virtual touch is difficult when the resolution of the depth image is large. In order to resolve the problem, this paper improves the algorithms of binarization and labeling that occupy a lot of time in all processing of virtual touch recognition. It processes the binarization and labeling in only necessary regions rather than all of the picture. By appling the proposed algorithm, the system can recognize the virtual touch in real-time as about 31ms per a frame in the depth image that has 640×480 resolution.

• ETRI Journal
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• v.32 no.5
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• pp.657-664
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• 2010

Many embedded multimedia systems employ special hardware blocks to co-process with the main processor. Even though an efficient handling of such hardware blocks is critical on the overall performance of real-time multimedia systems, traditional real-time scheduling techniques cannot afford to guarantee a high quality of multimedia playbacks with neither delay nor jerking. This paper presents a hardware-aware rate monotonic scheduling (HA-RMS) algorithm to manage hardware tasks efficiently and handle special hardware blocks in the embedded multimedia system. The HA-RMS prioritizes the hardware tasks over software tasks not only to increase the hardware utilization of the system but also to reduce the output jitter of multimedia applications, which results in reducing the overall response time.

• IEMEK Journal of Embedded Systems and Applications
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• v.15 no.6
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• pp.307-316
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• 2020

Machine learning model data is highly affected by performance. preprocessing is needed to enable analysis of various types of data, such as letters, numbers, and special characters. This paper proposes a development environment that aims to process categorical and continuous data according to the type of missing values in stage 1, implementing the function of selecting the best performing algorithm in stage 2 and automating the process of checking model performance in stage 3. Using this model, machine learning models can be created without prior knowledge of data preprocessing.

• Journal of Korea Multimedia Society
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• v.13 no.1
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• pp.30-37
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• 2010

Many embedded real - lime systems have adopted processors supported with dynamic voltage scal-ing(DVS) recently. Power is one of the important metrics for Optimization in the design and operation of embedded real-time systems. We can save considerable energy by using slowdown of processor sup-ported with DVS. In this paper, we improved the previous algorithm at a point of view of time complexity to calculate task slowdown factors for an efficient energy consumption in embedded real-time systems with task synchronization. We grasped the properties of the previous algorithm having $O(n^{2})$ time complexity through mathematical analysis and s simulation. Using its properties we proposed the improved algorithms with O(nlogn) and O(n) time complexity which have the same performance as the previous algorithm has.