• Journal of the Institute of Electronics Engineers of Korea SP
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• v.47 no.4
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• pp.97-104
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• 2010

In this paper, we provide an embedded type non-contact bio-radar heart and respiration rate monitoring system. We implemented the rate finding algorithm into the embedded system. The high-speed and reliable real-time signal processor is then tested. To avoid null-point data loss problem, we applied quadrature demodulation. Among several other combining techniques, we suggest arctangent demodulation for quadrature channel combining and DSP is used for real-time signal processing. We also suggest DC-offset compensation technique to preserve the wanted DC components of the IQ signals for accurate demodulation while keeping the dynamic range of the ADC lower. Using Texas Instrument C6711 series DSP and external 12Bit ADC, we implemented proper elliptic digital filter and autocorrelation detection algorithm for robust commercial hand held device.

• KIPS Transactions on Computer and Communication Systems
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• v.2 no.2
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• pp.59-66
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• 2013

In this paper, we proposed an optimal ILP algorithm on memory address code generation for DSP in embedded system. This paper using 0-1 ILP formulations DSP address generation units should minimize the memory variable data layout. We identify the possibility of the memory assignment of variable based on the constraints condition, and register the address code which a variable instructs in the program pointer. If the process sequence of the program is declared to the program pointer, then we apply the auto-in/decrement mode about the address code of the relevant variable. And we minimize the loads on the address registers to optimize the data layout of the variable. In this paper, in order to prove the effectiveness of the proposed algorithm, FICO Xpress-MP Modeling Tools were applied to the benchmark. The result that we apply a benchmark, an optimal memory layout of the proposed algorithm then the general declarative order memory on the address/modify register to reduce the number of loads, and reduced access to the address code. Therefor, we proved to reduce the execution time of programs.

• IEMEK Journal of Embedded Systems and Applications
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• v.3 no.4
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• pp.235-243
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• 2008

In this paper, a software-based Digital Radio Modiale(DRM) receiver is implemented on a Digital Signal Processor(DSP). DRM stands for the European radio broadcasting standard to bring AM radio into digital radio, designed to work at frequencies below 30MHz. DRM can offer various data services such as text messaging and slideshow services as well as audio services. The DRM receiver implemented on the Tensilica DSP core performs well at low signal strength indication of -102dBm.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.4C
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• pp.388-397
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• 2002

We designed a SIMD-DSP/FPU that can efficiently improve multimedia processing performance when integrated into high-performance embedded microprocessors. We proposed partitioned architectures and new schemes for several functional units to reduce chip area. Sharing functional units reduces the area of FPU significantly. The proposed architecture is modeled in HDL and synthesized with a 0.35$\mu\textrm{m}$ standard cell library. The chip area is estimated to be about 100,000 equivalent gates. The designed unit can run at higher than 50MHz clock frequency of CPU core under the worst-case operating conditions.

• Proceedings of the KIEE Conference
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• 2006.07b
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• pp.1027-1028
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• 2006

In this paper, design of current and speed controller for DC motor drive system using Embedded Target for TI C2000DSP in Matlab/Simulink is introduced. Current and speed controller is designed and implemented using program simply and easily, and speed control response of DC motor can be advanced. Current and speed control of DC motor is carried in eZdsp F2812 control board using Embeded Target for TI C2000DSP in Matlab/Simulink. Speed feedback is processed through A/D converter using tacho generator as speed sensor, and current feedback is processed through A/D converter using hall sensor as current sensor. Controller is designed to PI current controller and PI speed controller. Current and speed response is verified through simulations and experiments.

• IEMEK Journal of Embedded Systems and Applications
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• v.6 no.5
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• pp.319-325
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• 2011

Recently, collision avoidance systems are under development to reduce the traffic accidents and driver comfort for automotive radar. Pulse radar can detect their range and velocities of moving vehicles using range gate and FFT(Fast Fourier Transform) of the doppler frequency. We designed the real time DSP(Digital Signal Processing) based automotive UWB(Ultra Wideband) radar, and implemented DSP to detect the range and velocity within 100ms for real time system of the automotive UWB radar. We also measured the range and velocity of a moving vehicle using designed automotive UWB radar in a real road environment.

• IEMEK Journal of Embedded Systems and Applications
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• v.17 no.3
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• pp.185-190
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• 2022

We propose a high speed data communication method for motor drive systems with fast control cycle in order to collect state variables of motor control without degrading control performance. Ethernet is chosen for communication device, and multi-core DSP architecture is exploited for communication processing load distribution. The communication program including network protocol stack and motor control program are assigned to two separate cores, and data between two cores are exchanged using interrupt-based inter-process communication mechanism, which enables to achieve a high-speed communication performance without degrading the motor control performance. The performance of developed communication method is demonstrated by real experiments using TCP, UDP and Raw Socket protocols in an experimental setup consisting of TI's TMS320F28388D motor control card and MS Windows PC.

• IEMEK Journal of Embedded Systems and Applications
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• v.6 no.3
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• pp.117-123
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• 2011

In this paper, we design the hardware platform and implement the embedded software based on the FPGA and the DSP for the automotive 77GHz FMCW radar system. This embedded software is built into the DSP as the multi-tasking architecture to support the basic target detection algorithm and the Ethernet link. The designed GUI(Graphic User Interface) provides ability to adjust parameters associated with the radar performance, to monitor signal processing results, and to download the raw received signal. The designed platform can be used to develop the optimal detection algorithms for the various applications.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2006.05a
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• pp.302-308
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• 2006

We introduce the concept of a remote distributed embedded system to integrated fieldbus based control systems in internet/Intranet. As a result fieldbus systems are opened up for remote monitoring, remote maintenance, and remote control applications using state of the art Web-technology. This paper addresses the design of a remote distributed embedded system using Internet and CAN for multi-Induction motor of Building and Industrial field. The fieldbus used the CAN based networked intelligent multi-motor control system using DSP2812 microprocessor. To build such a system, the TCP/IP-CAN Gateway which convert a CAN protocol to TCP/IP protocol and vice verse, was designed. A experimental simulation system consists of a TCP/IP-CAN Gateway in remote place and a command PC ti be connected ti Ethernet.

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.257-260
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• 1999

We have designed a 32-bit RISC microprocessor with 16/32-bit fixed-point DSP functionality. This processor, called YRD-5, combines both general-purpose microprocessor and digital signal processor (DSP) functionality using the reduced instruction set computer (RISC) design principles. It has functional units for arithmetic operation, digital signal processing (DSP) and memory access. They operate in parallel in order to remove stall cycles after DSP and load/store instructions with one or more issue latency cycles. High performance was achieved with these parallel functional units while adopting a sophisticated 5-stage pipeline structure and an improved DSP unit.