• Journal of information and communication convergence engineering
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• v.11 no.1
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• pp.56-61
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• 2013

Modern integrated circuits (ICs) are becoming an integrated parts of analog, digital, and radio frequency (RF) circuits. Testing these RF circuits on a chip is an important task, not only for fabrication quality control but also for tuning RF circuit elements to fit multi-standard wireless systems. In this paper, RF test circuits suitable for embedded testing are introduced: RF power detectors, power control circuits, directional couplers, and six-port reflectometers. Various types of embedded RF power detectors are reviewed. The conventional approach and our approach for the RF power control circuits are compared. Also, embedded tunable active directional couplers are presented. Then, six-port reflectometers for embedded RF testing are introduced including a 77-GHz six-port reflectometer circuit in a 130 nm process. This circuit demonstrates successful calibrated reflection coefficient simulation results for 37 well distributed samples in a Smith chart. The details including the theory, calibration, circuit design techniques, and simulations of the 77-GHz six-port reflectometer are presented in this paper.

• The KIPS Transactions:PartA
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• v.9A no.4
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• pp.405-412
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• 2002

The embedded system has less fast CPU and lower memory than PC(personal Computer) or Workstation system. Therefore embedded operating is system is designed to efficiently use the limited resource in the system. Virtual memory management or the embedded linux have a low efficiency when page fault is occurred to get a data from I/O device. Because a data is moving from the swap device to main memory. This paper suggests virtual memory compression algorithm for improving in virtual memory management and capacity of space. In this paper, we present a way to performance implement a virtual memory compression system that achieves significant improvement for the embedded system.

• Proceedings of the IEEK Conference
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• 2004.08c
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• pp.532-535
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• 2004

Architecture generation is the first step in the design of software systems. Most of the qualities that the final software system possesses are usually decided at the architecture development stage itself. Thus, if the final system should be usable, testable, secure, high performance, mobile and adaptable, then these qualities or non­functional requirements should be engineered into the architecture itself. In particular, adaptability is emerging as an important attribute required by almost all software systems. The machinery and tools in the remote site surveillance and connects intelligence information machinery and tools at Internet. We need the server which uses different embedded operating system to become private use. With the progress of information-oriented society, many device with advanced technologies invented by many companies. However, the current firmware technologies have many problems to meet such high level of new technologies. In this paper, we have successfully ported linux on an embedded system, which is based on intel StrongARM SA-1 1 10 processor, then written several network modules for internet-based network devices.

• Proceedings of the IEEK Conference
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• 2002.07a
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• pp.216-219
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• 2002

A novel approach of embedded systems for video coding is introduced with the main theme focused on logic-enhanced DRAM and configurable processor. This approach is aiming at reducing high computational costs and frequent memory accessing, which embedded systems are suffering with in the execution of video coding. According Co the software execution analysis, large size functions with intensive memory accesses are tuned to be executed by the logic-enhanced DRAM while small size functions repeatedly called are to be executed by dedicated instructions, which are newly introduced in the configurable processor. The proposed system can speed up H.263 video coding algorithm 7.4 times in comparison with the conventional embedded processor based system.

• Journal of Korea Multimedia Society
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• v.19 no.10
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• pp.1759-1766
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• 2016

We can implement the virtual touch recognition system by mounting the virtual touch algorithm into an embedded device connected to a depth camera. Since the computing performance is limited in embedded system, the real-time processing of recognizing the virtual touch is difficult when the resolution of the depth image is large. In order to resolve the problem, this paper improves the algorithms of binarization and labeling that occupy a lot of time in all processing of virtual touch recognition. It processes the binarization and labeling in only necessary regions rather than all of the picture. By appling the proposed algorithm, the system can recognize the virtual touch in real-time as about 31ms per a frame in the depth image that has 640×480 resolution.

• Journal of information and communication convergence engineering
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• v.12 no.3
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• pp.145-153
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• 2014

The improvements of embedded processors make future technologies including wireless sensor network and internet of things feasible. These applications firstly gather information from target field through wireless network. However, this networking process is highly vulnerable to malicious attacks including eavesdropping and forgery. In order to ensure secure and robust networking, information should be kept in secret with cryptography. Well known approach is public key cryptography and this algorithm consists of finite field arithmetic. There are many works considering high speed finite field arithmetic. One of the famous approach is Montgomery multiplication. In this study, we investigated Montgomery multiplication for public key cryptography on embedded microprocessors. This paper includes helpful information on Montgomery multiplication implementation methods and techniques for various target devices including 8-bit and 16-bit microprocessors. Further, we expect that the results reported in this paper will become part of a reference book for advanced Montgomery multiplication methods for future researchers.

• The KIPS Transactions:PartA
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• v.8A no.2
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• pp.75-80
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• 2001

The rapid design of the embedded system is crucial for improving the product’s competitiveness. Existing statechart tools used for designing the embedded system rely on the copy and paste of the statechart for reuse. However, such method has a major drawback of wasting both time and cost of the system developer. This paper implements the component supporting tool. A tool that makes efficient reuse of a statechart by adding a component function to the existing functions is implemented in this paper. Also, to add a component function, this paper restructured the contract as protocol of the inter-component. The implemented tool helps not only reduce the life cycle of a product, but also enhance a product’s competitiveness by supporting the product’s time-to-market.

• International Journal of Fuzzy Logic and Intelligent Systems
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• v.5 no.3
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• pp.268-273
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• 2005

We propose the specialized product-line development methodology for developing the embedded system of an MSDFS (Multi Sensor Data Fusion System : called MSDFS). The product-line methodology provides a simultaneous design between software and hardware, high level reusability. However this is insufficient in requirement analysis stage due to be focused on software architecture, detailed design and code. Thus we apply the business model based on IDEF0 technique to traditional methodology. In this paper, we describe the processes of developing Core-Asset, which are requirement analysis, feature modeling, validation. The proposed model gives the efficient result for eliciting features, and ensures the high level reusability of modules performing on embedded system.

• Proceedings of the Korea Society of Information Technology Applications Conference
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• 2005.11a
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• pp.39-44
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• 2005

In recent years, embedded systems have become so complex and the development time to market is required to be shorter than before. As embedded systems include more functions for new services, embedded software gradually grow in size, and development costs and time are increasing. In order to overcome this serious matter, we need a customized design and test technique for embedded software. In this paper, we present a software architecture style for embedded software. It facilitates the composition of reusable functions and helps developers to reduce development time. Because the costs associated with revealing errors of embedded software in applications are rising. we propose a test method and tools for target environments.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2002.11a
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• pp.770-774
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• 2002

Recently, most of the embedded system have the function of multimedia information processing and network connecting. This make the overall system more complicated and need a new approach. Moreover the embedded system must be real-time system, which are different with Linux is constructed and the kernel is redesigned on the strong-arm board in order to make the real-time embedded web-server system.