• 제목/요약/키워드: Electronics Design Automation

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Machine learning-based design automation of CMOS analog circuits using SCA-mGWO algorithm

  • Vijaya Babu, E;Syamala, Y
    • ETRI Journal
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    • 제44권5호
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    • pp.837-848
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    • 2022
  • Analog circuit design is comparatively more complex than its digital counterpart due to its nonlinearity and low level of abstraction. This study proposes a novel low-level hybrid of the sine-cosine algorithm (SCA) and modified grey-wolf optimization (mGWO) algorithm for machine learning-based design automation of CMOS analog circuits using an all-CMOS voltage reference circuit in 40-nm standard process. The optimization algorithm's efficiency is further tested using classical functions, showing that it outperforms other competing algorithms. The objective of the optimization is to minimize the variation and power usage, while satisfying all the design limitations. Through the interchange of scripts for information exchange between two environments, the SCA-mGWO algorithm is implemented and simultaneously simulated. The results show the robustness of analog circuit design generated using the SCA-mGWO algorithm, over various corners, resulting in a percentage variation of 0.85%. Monte Carlo analysis is also performed on the presented analog circuit for output voltage and percentage variation resulting in significantly low mean and standard deviation.

Automatic Generation of Transaction Level Code for Fast SoC Design Space Exploration

  • Lee, Gang-Hee;Ahn, Yong-Jin;Choi, Ki-Young
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2006년도 하계종합학술대회
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    • pp.965-966
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    • 2006
  • As billion transistors system-on-chip (SoC) design becomes a reality, the productivity gap between rapidly increasing design complexity and designer productivity lagging behind is becoming a more serious problem to be solved. To reduce the gap, we present a system that generates executable transaction level models automatically. It speed up the SoC design space exploration process at various abstraction levels.

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VLSI 설계자동화 시스템을 위한 순서회로의 최적상태코드 할당 알고리듬 (An Optimal State-Code Assignment Algorithm of Sequential Circuits for VLSI Design Automation Systems)

  • 임재윤;임인칠
    • 대한전자공학회논문지
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    • 제26권1호
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    • pp.104-112
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    • 1989
  • 순서회로를 PLA로 실현하기 위한 설계자동화 방법에 대해 논했으며, PLA로 회로 실현시 면적최소화를 위한 최적 상태코드할당 알고리듬을 제안하였다. 회로기술이 용이하고 합성력이 강한 하드웨어 기술언어인 DASL9design automation support language)을 이용하여 회로를 기술한 후 이를 컴파일하여 그 결과를 PLA롸 자동설계하는 시스템을 제안한다. 순서회로의 각 상태에 대한 코드할당시 출력 및 다음상태를 동시에 고려하여 코드할당을 수행함으로서 종래의 할당법에 비해 평균 10%의 PLA 면적을 감ㅂ소 시킬 수 있었다. 본 시스템은 마이크로 인스트럭션, FSM, VLSI의 제어부설계등에 확장 적용할 수 있게 구성하였다.

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Modeling and Design of Zero-Voltage-Switching Controller for Wireless Power Transfer Systems Based on Closed-Loop Dominant Pole

  • Chen, Cheng;Zhou, Hong;Deng, Qijun;Hu, Wenshan;Yu, Yanjuan;Lu, Xiaoqing;Lai, Jingang
    • Journal of Power Electronics
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    • 제19권5호
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    • pp.1235-1247
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    • 2019
  • Zero-Voltage-Switching (ZVS) operation for a Wireless Power Transfer (WPT) system can be achieved by designing a ZVS controller. However, the performance of the controller in some industrial applications needs to be designed tightly. This paper introduces a ZVS controller design method for WPT systems. The parameters of the controller are designed according to the desired performance based on the closed loop dominant pole placement method. To describe the dynamic characteristics of the system ZVS angle, a nonlinear dynamic model is deduced and linearized using the small signal linearization method. By analyzing the zero-pole distribution, a low-order equivalent model that facilitates the controller design is obtained. The parameters of the controller are designed by calculating the time constant of the closed-loop dominant poles. A prototype of a WPT system with the designed controller and a five-stage multistage series variable capacitor (MSVC) is built and tested to verify the performance of the controller. The recorded response curves and waveforms show that the designed controller can maintain the ZVS angle at the reference angle with satisfactory control performance.

효율적 코드변환 알고리즘에 기반한 PLC 의 체계적 설계 (Systematic Design of Programmable Logic Controller Based on Efficient Code Conversion Algorithm)

  • 차종호;조광현
    • 제어로봇시스템학회논문지
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    • 제7권12호
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    • pp.1009-1014
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    • 2001
  • The ladder diagram (LD) for programmable logic controllers (PLCs) ar responsible for much important roles in advance industrial automation. As automated systems become more complex the design procedures of the system become more difficult as well. Hence. the design automation issues based on discrete event models(DEMs) are receiving more attention. One of the popular ways of tackling these problems is employing Petri nets. In this paper, we use the modified automation Petri net(MAPN) to model the manufacturing system and the modified token passing logic (MTPL) method conversion (ECC) algorithm based on the MAPN and the MTPL Finally, an example of the manufacturing system is provided to illustrate the proposed ECC algorithm.

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Resonant Tank Design Considerations and Implementation of a LLC Resonant Converter with a Wide Battery Voltage Range

  • Sun, Wenjin;Wu, Hongfei;Hu, Haibing;Xing, Yan
    • Journal of Power Electronics
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    • 제15권6호
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    • pp.1446-1455
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    • 2015
  • This paper illustrates resonant tank design considerations and the implementation of a LLC resonant converter with a wide battery voltage range based on the fundamental harmonic approximation (FHA) analysis. Unlike the conventional design at zero load, the parameter K (the ratio of the transformer magnetizing inductor Lm to the resonant inductor Lr) of the LLC converter in this paper is designed with two charging points, (Vo_min, Io_max1) and (Vo_max, Io_max2), according to the battery charging strategy. A 2.9kW prototype with an output voltage range of 36V to 72V dc is built to verify the design. It achieves a peak efficiency of 96%.

VLSI 설계 자동화에 대한 연구 (A study on the VLSI design automation)

  • 경종민
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 1986년도 한국자동제어학술회의논문집; 한국과학기술대학, 충남; 17-18 Oct. 1986
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    • pp.623-628
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    • 1986
  • This paper reviews various CAD(Computer-Aided design) or DA(Design Automation) procedures for specification, design and verification of VLSI chips. The growth and widening of engineering achievements and applicational varieties in this revisited field has been truly explosive for the last five years. Recent trends in VLSI/CAD area and their possible implications on the future evolution of DA society are briefly touched upon. The relative importance of chip specification and design capability within the whole Korean electronics infrastructure in the future is explained with several possible suggestions for coping with upcoming difficulties already being seen in this challenging yet promising area.

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프로그래밍형 자동화기기를 위한 실시간 메카니즘 제어언어의 설계 및 구현기법 (Design and implementation technique of real-time mechanism control language for programmable automation equipment)

  • 백정현;원용훈
    • 전자공학회논문지C
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    • 제34C권11호
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    • pp.29-38
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    • 1997
  • As the trend of the automation is increasing, the usage of the programmable automation equipments like programmable controller(PC), numerical controller(NC), distributed control systems(DCS) and robot controller is greatly expanding in the area of the industrial equipments. But the development of the programing language for the programmable automatic equipment is rarely accomplished. In this paper, we propose design and implementation technique of the real-time mechanism control language by adding time constraint constructs and timing analysis constructs ot conditional statement and iteration statement of a programming language. Moreover, we made it possible to predict plausibility of time constraint constructs of a real time application program at compilation time and developing execution time analysiss technique.

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FPGA application for wireless monitoring in power plant

  • Kumar, Adesh;Bansal, Kamal;Kumar, Deepak;Devrari, Aakanksha;Kumar, Roushan;Mani, Prashant
    • Nuclear Engineering and Technology
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    • 제53권4호
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    • pp.1167-1175
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    • 2021
  • The process of automation and monitoring in industrial control system involves the use of many types of sensors. A programmable logic controller plays an important role in the automation of the different processes in the power plant system. The major control units are boiler for temperature and pressure, turbine for speed of motor, generator for voltage, conveyer belt for fuel. The power plant units are controlled using microcontrollers and PLCs, but FPGA can be the feasible solution. The paper focused on the design and simulation of hardware chip to monitor boiler, turbine, generator and conveyer belt. The hardware chip of the plant is designed in Xilinx Vivado Simulator 17.4 software using VHDL programming. The methodology includes VHDL code design, simulation, verification and testing on Virtex-5 FPGA hardware. The system has four independent buzzers used to indicate the status of the boiler, generator, turbine motor and conveyer belt in on/off conditions respectively. The GSM is used to display corresponding message on the mobile to know the status of the device in on/off condition. The system is very much helpful for the industries working on plant automation with FPGA hardware integration.

An Electric-Field Coupled Power Transfer System with a Double-sided LC Network

  • Xie, Shi-Yun;Su, Yu-Gang;Zhou, Wei;Zhao, Yu-Ming;Dai, Xin
    • Journal of Power Electronics
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    • 제18권1호
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    • pp.289-299
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    • 2018
  • Electric-field coupled power transfer (ECPT) systems employ a high frequency electric field as an energy medium to transfer power wirelessly. Existing ECPT systems have made great progress in terms of increasing the transfer distance. However, the topologies of these systems are complex, and the transfer characteristics are very sensitive to variations in the circuit parameters. This paper proposes an ECPT system with a double-sided LC network, which employs a parallel LC network on the primary side and a series LC network on the secondary side. With the same transfer distance and output power, the proposed system is simpler and less sensitive than existing systems. The expression of the optimal driving voltage for the coupling structure and the characteristics of the LC networks are also analyzed, including the transfer efficiency, parameter sensitivity and total harmonic distortion. Then, a design method for the system parameters is provided according to these characteristics. Simulations and experiments have been carried out to verify the system properties and the design method.