• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.113-113
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• 2008

Cu CMP (Chemical Mechanical Planarization) has been used to remove copper film and obtain a planar surface which is essential for the semiconductor devices. Generally, it is known that chemical reaction is a dominant factor in Cu CMP comparing to Silicon dioxide CMP. Therefore, Cu CMP slurry has been regarded as an important factor in the entire process. This investigation focused on understanding the effect of corrosion inhibitor on copper surface and CMP results. Benzotriazole (BTA) was used as a corrosion inhibitor in this experiment. For the surface analysis, electrochemical characteristics of Cu was measured by a potentiostat and surface modification was investigated by X-ray photoelectron spectroscopy (XPS). As a result, corrosion potential (Ecorr) increased and nitrogen concentration ratio on the copper surface also increased with BTA concentration. These results indicate that BTA prevents Cu surface from corrosion and forms Cu-BTA layer on Cu surface. CMP results are also well matched with these results. Material removal rate (MRR) decreased with BTA concentration and static etch rate also showed same trend. Consequently, adjustment of BTA concentration can give us control of step height variation and furthermore, this can be applicable for Cu pattern CMP.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.76-76
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• 2008

The resonance properties due to the surface plasmon(SP) excitation of metal nanoparticles make the nanocomposite films promising for various applications such as optical switching devices. In spite of the well-known ultra-sensitive operation of optical switches based on a guided wave, the application of nanocomposite film(NC) has inherent limitation originating from the excessive optical loss related with the surface plasmon resonance(SPR). In this study, we addressed this problem and present the experimental and theoretical analysis on the pump-probe optical switching in prism-coupled Au(1 vol.%):$SiO_2$ nanocomposite waveguide film. The guided mode was successfully generated using a near infrared probe beam of 1550 nm and modulated with an external pump beam of 532 nm close to the SPR wavelength. We extend our approach to ultra-fast operation using a pulsed laser with 5 ns pulse width. To improve the switching speed through the reduction in thermal loading effect accompanied by the resonant absorption of pump beam light, we adopted a metallic film as a coupling layer instead of low-index dielectric layer between the high-index SF10 prism and NC slab waveguide. We observed great enhancement in switching speed for the case of using metallic coupling layer, and founded a distinct difference in origin of optical nonlinearities induced during switching operation using cw and ns laser.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.207-207
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• 2008

ZnO is one of the widely utilized n-type semiconducting oxide materials in the field of optoelectronic devices. For its application to the fabrication of promising ultraviolet (UV) photodetectors, ZnO with various structures has been extensively studied. However, study on the photodetectors using zero-dimensional (0-D) ZnO nanoparticle is scarce while the 0-D nanoparticle structure has many advantages compared to the other dimensional structures for absorption of light. In this study, the photocurrent characteristics of ZnO nanoparticles were investigated through a simply pasting of the nanoparticles across the pre-patterned electrodes. Then the photoluminescence (PL) characteristic, photocurrent response spectrum, photo- and dark-current and photoresponse spectrum were investigated with a He-Cd laser and an Xe lamp. An dominant PL peak of the ZnO nanoparticles was located at the wavelength of 380 nm under the illumination of 325-nm wavelength light. The ratio of photocurrent to dark current (on/off ratio) is as high as 106 which is considerable value for promising photodetectors. On the other hand, the time constants in photoresponse were relatively slow. The reasons of the high on/off ratio and relatively slow photoresponse characteristic will be discussed.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.131-131
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• 2008

Silicon carbide (SiC) has attracted significant attention for high frequency, high temperature and high power devices due to its superior properties such as the large band gap, high breakdown electric field, high saturation velocity and high thermal conductivity. We performed Al ion implantation processes on n-type 4H-SiC substrate using a SILVACO ATHENA numerical simulator. The ion implantation model used a Monte-Carlo method. We studied the effect of channeling by Al implantation simulation in both 0 off-axis and 8 off-axis n-type 4H-SiC substrate. We have investigated the Al distribution in 4H-SiC through the variation of the implantation energies and the corresponding ratio of the doses. The implantation energies controlled 40, 60, 80, 100 and 120 keV and the implantation doses varied from $2\times10^{14}$ to $1\times10^{15}cm^{-2}$. In the simulation results, the Al ion distribution was deeper as increasing implantation energy and the doping level increased as increasing implantation doses. After the post-implantation annealing, the electrical properties of Al-implanted p-n junction diode were investigated by SILV ACO ATLAS numerical simulator.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.87-88
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• 2008

In the structure of ITO/N,N'-diphenyl-N,N' bis (3-methylphenyl)-1,1'-biphenyl-4,4'-diamine(TPD)/tris (8-hydroxyquinoline)aluminum$(Alq_3)$/Al device, we studied the efficiency improvement of organic light-emitting diodes due to variation of deposition rate of TPD materials. The thickness of TPD and $Alq_3$ was manufactured 40 nm, 60 nm, respectively under a base pressure of $5\times10^{-6}$Torr using a thermal evaporation. The $Alq_3$ used for an electron-transport and emissive layer were evaporated to be at a deposition rate of 2.5 $\AA$/s. When the deposition rate of TPD increased from 1.5 to 3.0 $\AA$/s, we found that the average roughness is rather smoother, external quantum efficiency is superior to the others when the deposition rate of TPD is 2.5 $\AA$/s. Compared to the ones from the devices made with the deposition rate of TPD 3.0 $\AA$/s, the external quantum efficiency was improved by a factor of eight.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.174-174
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• 2008

Non-volatile memories using ferroelectric-gate field-effect transistors (Fe-FETs) with a metal/ferroelectric/semiconductor gate stack (MFS-FETs) make non-destructive read operation possible. In addition, they also have features such as high switching speed, non-volatility, radiation tolerance, and high density. However, the interface reaction between ferroelectric materials and Si substrates, i.e. generation of mobile ions and short retention, make it difficult to obtain a good ferroelectric/Si interface in an MFS-FET's gate. To overcome these difficulties, Fe-FETs with a metal/ferroelectric/insulator/semiconductor gate stack (MFIS-FETs) have been proposed, where insulator as a buffer layer is inserted between ferroelectric materials and Si substrates. We prepared $SrBi_2Ta_2O_9$ (SBT) film as a ferroelectric layer and $LaZrO_x$ (LZO) film as a buffer layer on p-type (100) silicon wafer for making the MFIS-FET devices. For definition of source and drain region, phosphosilicate glass (PSG) thin film was used as a doping source of phosphorus (P). Ultimately, the n-channel ferroelectric-gate FET using the SBT/LZO/Si Structure is fabricated. To examine the ferroelectric effect of the fabricated Fe-FETs, drain current ($I_d$) versus gate voltage ($V_g$) characteristics in logarithmic scale was measured. Also, drain current ($I_d$) versus drain voltage ($V_d$) characteristics of the fabricated SBT/LZO/Si MFIS-FETs was measured according to the gate voltage variation.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.65 no.5
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• pp.843-850
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• 2016

In this paper, we propose a digital controller design process for the interleaved type of a boost PFC (Power Factor Correction) converter which can disperse the heat of the switching devices due to the interleaved topology. We establish a mathematical model of a boost PFC converter and propose a controller design method based on the root locus. The performance of the designed controller is verified by simulations. The measurement of the input voltage, inductor currents, and the converter output link voltage are needed for the control of the converter system which consists of a power unit and a control unit where a high-performance 32-bit microcontroller is used. The adjustment of A/D conversion timing is also needed to avoid high frequency noise generated when the switches on/off. It is illustrated by the real experiments that the designed control system with the properly adjusted ADC timing satisfies the given performance specifications of the interleaved boost PFC converter in the on-board slow battery charger.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.8 no.6
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• pp.507-514
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• 2015

The Internet of Things era is approaching where all the things are equipped with smart sensors and communicate through internet. The three core technologies of the Internet of Things are 'detection technology' to get information from things and the environment, 'wired and wireless communications and network infrastructure skills' that support to connect things to the internet, and 'service interface technology' that processes the information appropriate to various services. Smart sensor application can expand to smartphone, smart cars, smart home systems, wearable electronic devices, telemedicine systems, and environmental monitoring systems, etc. In particular, technologies that mimic the five human senses. This study reviews the biological principles of the human senses and the principles of operation, research & development status, technology trends and market analysis of the sensors.

• Journal of Power Electronics
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• v.16 no.3
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• pp.1209-1217
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• 2016

This paper presents a novel charge pump scheme that combines the advantages of Fibonacci and Dickson charge pumps to obtain 30 V voltage for display driver integrated circuit application. This design only requires four external capacitors, which is suitable for a small-package application, such as smart card displays. High-amplitude (<6.6 V) clocks are produced to enhance the gate drive of a Dickson charge pump and improve the system's current drivability by using a voltage-doubler charge pump with a pulse skip regulator. This regulation engages many middle-voltage devices, and approximately 30% of chip size is saved. Further optimization of flying capacitors tends to decrease the total chip size by 2.1%. A precise and simple model for a one-stage Fibonacci charge pump with current load is also proposed for further efficiency optimization. In a practical design, its voltage error is within 0.12% for 1 mA of current load, and it maintains a 2.83% error even for 10 mA of current load. This charge pump is fabricated through a 0.11 μm 1.5 V/6 V/32 V process, and two regulators, namely, a pulse skip one and a linear one, are operated to maintain the output of the charge pump at 30 V. The performances of the two regulators in terms of ripple, efficiency, line regulation, and load regulation are investigated.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.4
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• pp.292-297
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• 2003

We fabricated a single crystal silicon thin film transistor for active matrix organic light emitting displays(AMOLEDs) using silicon on insulator wafer (SOI wafer). Poly crystal silicon thin film transistor(poly-Si TFT) Is actively researched and developed nowsdays for a pixel switching devices of AMOLEDs. However, poly-Si TFT has some disadvantages such as high off-state leakage currents and low field-effect mobility due to a trap of grain boundary in active channel. While single crystal silicon TFT has many advantages such as high field effect mobility, low off-state leakage currents, low power consumption because of the low threshold voltage and simultaneous integration of driving ICs on a substrate. In our experiment, we compared the property of poly-Si TFT with that of SOI TFT. Poly-Si TFT exhibited a field effect mobility of 34 $\textrm{cm}^2$/Vs, an off-state leakage current of about l${\times}$10$\^$-9/ A at the gate voltage of 10 V, a subthreshold slope of 0.5 V/dec and on/off ratio of 10$\^$-4/, a threshold voltage of 7.8 V. Otherwise, single crystal silicon TFT on SOI wafer exhibited a field effect mobility of 750 $\textrm{cm}^2$/Vs, an off-state leakage current of about 1${\times}$10$\^$-10/ A at the gate voltage of 10 V, a subthreshold slope of 0.59 V/dec and on/off ratio of 10$\^$7/, a threshold voltage of 6.75 V. So, we observed that the properties of single crystal silicon TFT using SOI wafer are better than those of Poly Si TFT. For the pixel driver in AMOLEDs, the best suitable pixel driver is single crystal silicon TFT using SOI wafer.