• Journal of Sensor Science and Technology
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• v.29 no.1
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• pp.68-73
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• 2020

This paper proposes an asynchronous circuit design methodology using a new Single Gate Sleep Convention Logic (SG-SCL) with advantages such as low area overhead, low power consumption compared with the conventional null convention logic (NCL) methodologies. The delay-insensitive NCL asynchronous circuits consist of dual-rail structures using {DATA0, DATA1, NULL} encoding which carry a significant area overhead by comparison with single-rail structures. The area overhead can lead to high power consumption. In this paper, the proposed single gate SCL deploys a power gating structure for a new {DATA, SLEEP} encoding to achieve low area overhead and low power consumption maintaining high performance during DATA cycle. In this paper, the proposed methodology has been evaluated by a liquid state machine (LSM) for pattern and digit recognition using FPGA and a 0.18 ㎛ CMOS technology with a supply voltage of 1.8 V. the LSM is a neural network (NN) algorithm similar to a spiking neural network (SNN). The experimental results show that the proposed SG-SCL LSM reduced power consumption by 10% compared to the conventional LSM.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.29 no.10
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• pp.630-634
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• 2016

In this paper, we analyzed the power consumption and the accumulated energy in HTSC (high-TC superconducting elements) according to the resistance of HTSC element and the winding current of transformer type SFCL (superconducting fault current limiter) using double quench. For the analysis, two different inductances of the one secondary winding among two secondary windings comprising the transformer type SFCL were selected and the short-circuit tests were carried out. The consumed power and the accumulated energy in HTSC element connected into the secondary winding with larger inductance were analyzed to be larger compared to the one connected into the secondary winding with lower inductance.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.05b
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• pp.104-108
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• 2004

The effect of magnetic field was measured on NOx removal for cylinder-wire plasma reactor with magnetic field applied to electric field vertically. Power was supplied to plasma reactor using rotating spark gap switch. Consumption power increased with increasing discharge voltage. When magnetic field was applied to electric field vertically, consumption power was less than that without magnetic field because of lorenz's force. NOx removal rate of plasma reactor with magnetic field were higher, 10-15%, than that of plsama reactor without magnetic field. And NOx removal rate decreased with increasing gas flow rate.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.11a
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• pp.343-346
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• 2000

This paper presents the characteristics of low consumption, high-response time hot-film type micro-flowsensors with SOI(Si-on-insulator) and trench structures. Output voltages increased due to increase of heat-loss from sensor to external. Compared with no-trench on the SOI structure, the micro-flowsensors with trench structures have properties of high output voltage and low consume power. Output voltage of micro-flowsensors with SOI and trench structures was 250 mV at $N_2$ flow rate of 2000 sccm/min, heating power of 0.3 W. The response time was about 85 msec when input flow was step-input.

• Proceedings of the IEEK Conference
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• 2002.07c
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• pp.1401-1403
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• 2002

This paper presents the development of an electronic dash-pot(EDP) system it)r protecting the power electronic circuit. The EDP play role protecting an equipment by disconnecting between voltage source and load system. Also, converting the existed electrical system into an electronic mechanism, it can reduce the power consumption and prevents the system damage due to over current.

• Journal of information and communication convergence engineering
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• v.16 no.3
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• pp.135-141
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• 2018

Wireless sensor networks (WSN) are composed of a large number of sensor nodes. Battery-powered sensor nodes have limited coverage; therefore, it is more efficient to transmit data via multi-hop communication. The network lifetime is a crucial issue in WSNs and the multi-hop routing protocol should be designed to prolong the network lifetime. Prolonging the network lifetime can be achieved by minimizing the power consumed by the nodes, as well as by balancing the power consumption among the nodes. A power imbalance can reduce the network lifetime even if several nodes have sufficient (battery) power. In this paper, we propose a routing protocol that prolongs the network lifetime by balancing the power consumption among the nodes. To improve the balance of power consumption and improve the network lifetime, the proposed routing scheme adaptively controls the transmission range using a power control according to the residual power in the nodes. We developed a routing simulator to evaluate the performance of the proposed routing protocol. The simulation results show that the proposed routing scheme increases power balancing and improves the network lifetime.

• Transactions on Electrical and Electronic Materials
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• v.6 no.4
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• pp.173-176
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• 2005

A new $MoO_3$ based microsensor with low power consumption was presented. Typical size of sensor was 5mm in width and 8mm in length. As a sensitive electrode, $MoO_3$ was successfully fabricated by IC technology on pyrex glass of $250{\mu}m$ in thickness. After annealing at $550^{\circ}C$ for 3hrs, the film was fully crystallized and demonstrated as pure $MoO_3$ structure. The grain size of $MoO_3$ was plat like and typical size was about $1{\mu}m$. Based on the results of sensitivity measurement, $MoO_3$ microsensor shows especially high selectivity to $H_2$ reducing gas atmosphere. The applied heater power was lower than 0.5 Watt.

• Journal of Sensor Science and Technology
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• v.27 no.1
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• pp.59-63
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• 2018

Among Internet of things (IoT) applications, the most demanding requirements for the widespread realization of many IoT visions are security and low power. In terms of security, IoT applications include tasks that are rarely addressed before such as secure computation, trusted sensing, and communication, privacy, and so on. These tasks ask for new and better techniques for the protection of data, software, and hardware. An integral part of hardware cryptographic primitives are secret keys and unique IDs. Physical Unclonable Functions(PUF) are a unique class of circuits that leverage the inherent variations in manufacturing process to create unique, unclonable IDs and secret keys. In this paper, we propose a low power Arbiter PUF circuit with low error rate and high reliability compared with conventional arbiter PUFs. The proposed PUF utilizes a power gating structure to save the power consumption in sleep mode, and uses a razor flip-flop to increase reliability. PUF has been designed and implemented using a FPGA and a ASIC chip (a 0.35 um technology). Experimental results show that our proposed PUF solves the metastability problem and reduce the power consumption of PUF compared to the conventional Arbiter PUF. It is expected that the proposed PUF can be used in systems required low power consumption and high reliability such as low power encryption processors and low power biomedical systems.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.12
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• pp.1078-1085
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• 2011

In this paper, we analyze the relationship between energy per bit and the data rate with the variation of the system bandwidth. A existing power model is mathematical model to express power consumption of each device. In this paper, we have to investigate the system level energy model for the RF front-end of a wireless transceiver. Also, the effects of the signal bandwidth, PAR, date rate, modulation level, transmission distance, specific attenuation of frequency band, and the signal center frequency on the RF front-end energy consumption and system capacity are considered. Eventually, we analyze the relationship between energy per bit and the data rate with the variation of the system bandwidth so that we simulate the minimum energy per bit in the several Gbps data rate using Shannon capacity theory.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.11 no.8
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• pp.3918-3934
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• 2017

This paper presents a viewport resolution scaling technique to reduce power consumption in mobile graphic processing units (GPUs). This technique controls the rendering resolution of applications in proportion to the resolution factor. In the mobile environment, it is essential to find an effective resolution factor to achieve low power consumption because both the resolution and power consumption of a GPU are in mutual trade-off. This paper presents a resolution factor that can minimize image quality degradation and gain power reduction. For this purpose, software and hardware viewport resolution scaling techniques are applied in the Android environment. Then, the correlation between image quality and power consumption is analyzed according to the resolution factor by conducting a benchmark analysis in the real commercial environment. Experimental results show that the power consumption decreased by 36.96% on average by the hardware viewport resolution scaling technique.