• Title/Summary/Keyword: Electronic Loads

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Grid Peak Power Limiting / Compensation Power Circuit for Power Unit under Dynamic Load Profile Conditions (Dynamic Load Profile 조건의 전원 장치에 있어서 계통 Peak Power 제한/보상 전력 회로)

  • Jeong, Hee-Seong;Park, Do-Il;Lee, Yong-Hwi;Lee, Chang-Hyeon;Rho, Chung-Wook
    • The Transactions of the Korean Institute of Power Electronics
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    • v.27 no.5
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    • pp.376-383
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    • 2022
  • The improved performance of computer parts, such as graphic card, CPU, and main board, has led to the need for power supplies with a high power output. The dynamic load profile rapidly changes the usage of power consumption depending on load operations, such as PC power and air conditioner. Under dynamic load profile conditions, power consumption can be classified into maximum, normal, and standby power. Several problems arise in the case of maximum power. Peak power is generated at the system power source in the maximum-power situation. Frequent generation of peak power can cause high-frequency problems and reduce the life of high-pressure parts (especially high-pressure capacitors). For example, when a plurality of PCs are used, system overload occurs due to peak power generation and causes problems, such as power failure and increase in electricity bills due to exceeded contract power. To solve this problem, a system peak power limit/compensation power circuit is proposed for a power supply under dynamic load profile conditions. The proposed circuit detects the system current to determine the power situation of the load. When the system current is higher than the set level, the circuit recognizes that the system current generates peak power and compensates for the load power through a converter using a super capacitor as the power source. Thus, the peak power of loads with a dynamic load profile is limited and compensated for, and problems, such as high-frequency issues, are solved. In addition, the life of high-pressure parts is increased.

Multi Area Power Dispatch using Black Widow Optimization Algorithm

  • Girishkumar, G.;Ganesan, S.;Jayakumar, N.;Subramanian, S.
    • International Journal of Computer Science & Network Security
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    • v.22 no.10
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    • pp.113-130
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    • 2022
  • Sophisticated automation-based electronics world, more electrical and electronic devices are being used by people from different regions across the universe. Different manufacturers and vendors develop and market a wide variety of power generation and utilization devices under different operating parameters and conditions. People use a variety of appliances which use electrical energy as power source. These appliances or gadgets utilize the generated energy in different ratios. Night time the utilization will be less when compared with day time utilization of power. In industrial areas especially mechanical industries or Heavy machinery usage regions power utilization will be a diverse at different time intervals and it vary dynamically. This always causes a fluctuation in the grid lines because of the random and intermittent use of these apparatus while the power generating apparatus is made to operate to provide a steady output. Hence it necessitates designing and developing a method to optimize the power generated and the power utilized. Lot of methodologies has been proposed in the recent years for effective optimization and economical load dispatch. One such technique based on intelligent and evolutionary based is Black Widow Optimization BWO. To enhance the optimization level BWO is hybridized. In this research BWO based optimize the load for multi area is proposed to optimize the cost function. A three type of system was compared for economic loads of 16, 40, and 120 units. In this research work, BWO is used to improve the convergence rate and is proven statistically best in comparison to other algorithms such as HSLSO, CGBABC, SFS, ISFS. Also, BWO algorithm best optimize the cost parameter so that dynamically the load and the cost can be controlled simultaneously and hence effectively the generated power is maximum utilized at different time intervals with different load capacity in different regions of utilization.

Analysis of Stress Concentration between Fillet and Hole in a Stepped Plate under Tensile Load by Photoelasticity (단이 진 인장부재 필릿과 구멍사이 응력집중에 관한 광탄성법 해석)

  • Baek, Tae-Hyun;Kim, Myung-Soo;Kim, Young-Chul
    • Asia-pacific Journal of Multimedia Services Convergent with Art, Humanities, and Sociology
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    • v.5 no.2
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    • pp.207-214
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    • 2015
  • Stress concentrations around discontinuities, such as a hole or a sudden change in cross section of a structural member, have great important cause in the most materials failure because the stress near the points of application of concentrated loads can reach values much larger than the average value of the stress in the member. This paper presents the stress concentrations between fillet and hole at different locations in a stepped plate under tensile loading. The analysis for interaction effect of stress concentration was performed by photoelasticity and ANSYS which is a commercial finite element software. From the analysis results, the circular hole located at the different position from the fillet radius can cause different values of stress concentration factor within interacting region.

A Development of Fusion Processor Architecture for Efficient Main Memory Access in CPU-GPU Environment (CPU-GPU환경에서 효율적인 메인메모리 접근을 위한 융합 프로세서 구조 개발)

  • Park, Hyun-Moon;Kwon, Jin-San;Hwang, Tae-Ho;Kim, Dong-Sun
    • The Journal of the Korea institute of electronic communication sciences
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    • v.11 no.2
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    • pp.151-158
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    • 2016
  • The HSA resolves an old problem with existing CPU and GPU architectures by allowing both units to directly access each other's memory pools via unified virtual memory. In a physically realized system, however, frequent data exchanges between CPU and GPU for a virtual memory block result bottlenecks and coherence request overheads. In this paper, we propose Fusion Processor Architecture for efficient access of main memory from both CPU and GPU. It consists of Job Manager, Re-mapper, and Pre-fetcher to control, organize, and distribute work loads and working areas for GPU cores. These components help on reducing memory exchanges between the two processors and improving overall efficiency by eliminating faulty page table requests. To verify proposed algorithm architectures, we develop an emulator based on QEMU, and compare several architectures such as CUDA(Compute Unified Device Architecture), OpenMP, OpenCL. As a result, Proposed fusion processor architectures show 198% faster than others by removing unnecessary memory copies and cache-miss overheads.

Fast Multiple-Image-Based Deblurring Method (다중 영상 기반의 고속 처리용 디블러링 기법)

  • Son, Chang-Hwan;Park, Hyung-Min
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.49 no.4
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    • pp.49-57
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    • 2012
  • This paper presents a fast multiple-image-based deblurring method that decreases the computation loads in the image deblurring, enhancing the sharpness of the textures or edges of the restored images. First, two blurred images with some blurring artifacts and one noisy image including severe noises are consecutively captured under a relatively long and short exposures, respectively. To improve the processing speeds, the captured multiple images are downsampled at the ratio of two, and then a way of estimating the point spread function(PSF) based on the image or edge patches extracted from the whole images, is introduced. The method enables to effectively reduce the computation time taken in the PSF prediction. Next, the texture-enhanced image deblurring method of supplementing the ability of the texture representation degraded by the downsampling of the input images, is developed and then applied. Finally, to get the same image size as the original input images, an upsampling method of utilizing the sharp edges of the captured noisy image is applied. By using the proposed method, the processing times taken in the image deblurring, which is the main obstacle of its application to the digital cameras, can be shortened, while recovering the fine details of the textures or edge components.

Development of 3D Radiation Position Identification System of Multiple Radiation Sources using Plastic Scintillator and NaI(TI) Detector (플라스틱 Scintillator와 NaI(TI) 검출기를 이용한 다수의 방사선원 위치를 3차원으로 판별하는 측정시스템 개발)

  • Kwak, Dong-Hoon;Ko, Tae-Young;Lee, Seung-Ho
    • Journal of IKEEE
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    • v.22 no.3
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    • pp.638-644
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    • 2018
  • In this paper, we develop a measurement system that uses 3D Scintillator and NaI(TI) Detector to 3-dimensionally identify the location of multiple radiation sources in moving vehicle loads. The radiation measurement system consists of radiation measurement (plastic scintillator), 2-channel Pulse Counter Board, nuclide analysis (NaI(TI) detector) and 1 channel MCA Board. The source locator algorithm calculates the coordinate value of the ratio of the CPS value($1/r^2$) of the source according to the angle(${\theta}$) in inverse proportion to the square of the distance(X, Y) through the SVM classification. The coordinate values are input every predetermined period of the spectrum, and after analyzing the spectrum per unit cycle, the position of the nuclide at the time is calculated by determining whether or not the nuclide is present in the remaining part except for the background area. As a result of the position discrimination test, the error within the international standard of ${\pm}1m$ was shown. Thus, the utility of the proposed system has been demonstrated.

Design of 5V NMOS-Diode eFuse OTP IP for PMICs (PMIC용 5V NMOS-Diode eFuse OTP IP 설계)

  • Kim, Moon-Hwan;Ha, Pan-Bong;Kim, Young-Hee
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.10 no.2
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    • pp.168-175
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    • 2017
  • In this paper, a 5V small-area NMOS-diode eFuse OTP memory cell is proposed. This cell which is used in PMICs consists of a 5V NMOS transistor and an eFuse link as a memory part, based on a BCD process. Also, a regulated voltage of V2V ($=2.0V{\pm}10%$) instead of the conventional VDD is used to the pull-up loads of a VREF circuit and a BL S/A circuit to obtain a wider operational voltage range of the eFuse memory cell. When this proposed cells are used in the simulation, their sensing resistances are found to be $15.9k{\Omega}$ and $32.9k{\Omega}$, in the normal read mode and in the program-verify-read mode, respectively. Furthermore, the read current flowing through a non-blown eFuse is restricted to $97.7{\mu}A$. Thus, the eFuse link of a non-blown eFuse OTP memory cell is kept non-blown. The layout area of the designed 1kb eFuse OTP memory IP based on Dongbu HiTek's BCD process is $168.39{\mu}m{\times}479.45{\mu}m(=0.08mm^2)$.

Review on Usefulness of EPID (Electronic Portal Imaging Device) (EPID (Electronic Portal Imaging Device)의 유용성에 관한 고찰)

  • Lee, Choong Won;Park, Do Keun;Choi, A Hyun;Ahn, Jong Ho;Song, Ki Weon
    • The Journal of Korean Society for Radiation Therapy
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    • v.25 no.1
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    • pp.57-67
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    • 2013
  • Purpose: Replacing the film which used to be used for checking the set-up of the patient and dosimetry during radiation therapy, more and more EPID equipped devices are in use at present. Accordingly, this article tried to evaluated the accuracy of the position check-up and the usefulness of dosimetry during the use of an electronic portal imaging device. Materials and Methods: On 50 materials acquired with the search of Korea Society Radiotherapeutic Technology, The Korean Society for Radiation Oncology, and Pubmed using "EPID", "Portal dosimetry", "Portal image", "Dose verification", "Quality control", "Cine mode", "Quality - assurance", and "In vivo dosimetry" as indexes, the usefulness of EPID was analyzed by classifying them as history of EPID and dosimetry, set-up verification and characteristics of EPID. Results: EPID is developed from the first generation of Liquid-filled ionization chamber, through the second generation of Camera-based fluoroscopy, and to the third generation of Amorphous-silicon EPID imaging modes can be divided into EPID mode, Cine mode and Integrated mode. When evaluating absolute dose accuracy of films and EPID, it was found that EPID showed within 1% and EDR2 film showed within 3% errors. It was confirmed that EPID is better in error measurement accuracy than film. When gamma analyzing the dose distribution of the base exposure plane which was calculated from therapy planning system, and planes calculated by EDR2 film and EPID, both film and EPID showed less than 2% of pixels which exceeded 1 at gamma values (r%>1) with in the thresholds such as 3%/3 mm and 2%/2 mm respectively. For the time needed for full course QA in IMRT to compare loads, EDR2 film recorded approximately 110 minutes, and EPID recorded approximately 55 minutes. Conclusion: EPID could easily replace conventional complicated and troublesome film and ionization chamber which used to be used for dosimetry and set-up verification, and it was proved to be very efficient and accurate dosimetry device in quality assurance of IMRT (intensity modulated radiation therapy). As cine mode imaging using EPID allows locating tumors in real-time without additional dose in lung and liver which are mobile according to movements of diaphragm and in rectal cancer patients who have unstable position, it may help to implement the most optimal radiotherapy for patients.

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Comparative Analysis of ViSCa Platform-based Mobile Payment Service with other Cases (스마트카드 가상화(ViSCa) 플랫폼 기반 모바일 결제 서비스 제안 및 타 사례와의 비교분석)

  • Lee, June-Yeop;Lee, Kyoung-Jun
    • Journal of Intelligence and Information Systems
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    • v.20 no.2
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    • pp.163-178
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    • 2014
  • Following research proposes "Virtualization of Smart Cards (ViSCa)" which is a security system that aims to provide a multi-device platform for the deployment of services that require a strong security protocol, both for the access & authentication and execution of its applications and focuses on analyzing Virtualization of Smart Cards (ViSCa) platform-based mobile payment service by comparing with other similar cases. At the present day, the appearance of new ICT, the diffusion of new user devices (such as smartphones, tablet PC, and so on) and the growth of internet penetration rate are creating many world-shaking services yet in the most of these applications' private information has to be shared, which means that security breaches and illegal access to that information are real threats that have to be solved. Also mobile payment service is, one of the innovative services, has same issues which are real threats for users because mobile payment service sometimes requires user identification, an authentication procedure and confidential data sharing. Thus, an extra layer of security is needed in their communication and execution protocols. The Virtualization of Smart Cards (ViSCa), concept is a holistic approach and centralized management for a security system that pursues to provide a ubiquitous multi-device platform for the arrangement of mobile payment services that demand a powerful security protocol, both for the access & authentication and execution of its applications. In this sense, Virtualization of Smart Cards (ViSCa) offers full interoperability and full access from any user device without any loss of security. The concept prevents possible attacks by third parties, guaranteeing the confidentiality of personal data, bank accounts or private financial information. The Virtualization of Smart Cards (ViSCa) concept is split in two different phases: the execution of the user authentication protocol on the user device and the cloud architecture that executes the secure application. Thus, the secure service access is guaranteed at anytime, anywhere and through any device supporting previously required security mechanisms. The security level is improved by using virtualization technology in the cloud. This virtualization technology is used terminal virtualization to virtualize smart card hardware and thrive to manage virtualized smart cards as a whole, through mobile cloud technology in Virtualization of Smart Cards (ViSCa) platform-based mobile payment service. This entire process is referred to as Smart Card as a Service (SCaaS). Virtualization of Smart Cards (ViSCa) platform-based mobile payment service virtualizes smart card, which is used as payment mean, and loads it in to the mobile cloud. Authentication takes place through application and helps log on to mobile cloud and chooses one of virtualized smart card as a payment method. To decide the scope of the research, which is comparing Virtualization of Smart Cards (ViSCa) platform-based mobile payment service with other similar cases, we categorized the prior researches' mobile payment service groups into distinct feature and service type. Both groups store credit card's data in the mobile device and settle the payment process at the offline market. By the location where the electronic financial transaction information (data) is stored, the groups can be categorized into two main service types. First is "App Method" which loads the data in the server connected to the application. Second "Mobile Card Method" stores its data in the Integrated Circuit (IC) chip, which holds financial transaction data, which is inbuilt in the mobile device secure element (SE). Through prior researches on accept factors of mobile payment service and its market environment, we came up with six key factors of comparative analysis which are economic, generality, security, convenience(ease of use), applicability and efficiency. Within the chosen group, we compared and analyzed the selected cases and Virtualization of Smart Cards (ViSCa) platform-based mobile payment service.

Material Life Cycle Assessment of Graphene 2wt% Added to Li1.6Ni0.35Mn0.65O2 Half-Cell (그래핀 2wt%를 첨가한 Li1.6Ni0.35Mn0.65O2 Half-Cell의 물질 전 과정 평가)

  • CHO, KYOUNG-WON;LEE, YOUNG-HWAN;HAN, JEONG-HEUM;YU, JAE-SEON;HONG, TAE-WHAN
    • Transactions of the Korean hydrogen and new energy society
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    • v.31 no.1
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    • pp.132-137
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    • 2020
  • Lithium secondary batteries have become an important power source for portable electronic devices such as cellular phones, laptop computers. Presently, commercialized lithium-ion batteries use a LiCoO2 cathode. However, due to the high cost and environmental problems resulting from cobalt, an intensive search for new electrode materials is being actively conducted. Recently, solid solution LiMn1-xNixO2 have become attractive because of high capacity and enhanced safety at high voltages over 4.5 V. The Li1.6Ni0.35Mn0.65O2 compounds were conventionally prepared by a sol-gel method, which can produce the layered Li-Ni-Mn-O compounds with a high homogeneity. And by adding a graphene 2wt% the first charge-discharge voltage profiles was increased over Li1.6Ni0.35Mn0.65O2 compound. Also, the variation s of the discharge capacities with cycling showed a higher capacity retention rater. In this study, material lifecycle evaluation was performed to analyze the environmental impact characteristics of Li1.6Ni0.35Mn0.65O2 & graphene 2wt% half-cell manufacturing process. The software of material life cycle assessment was Gabi. Through this, environmental impact assessment was performed for each process. The environmental loads induced by Li1.6Ni0.35Mn0.65O2 & graphene 2wt% synthesis process were quantified and analyzed, and the results showed that the amount of power had the greatest impact on the environment.