• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.18 no.2
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• pp.185-195
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• 2018

As machines have been automated in the field of industries in recent years, it is a paramount importance to manage and maintain the automation machines. When a fault occurs in sensors attached to the machine, the machine may malfunction and further, a huge damage will be caused in the process line. To prevent the situation, the fault of sensors should be monitored, diagnosed and classified in a proper way. In the paper, we propose a sensor fault detection scheme based on SVM and CNN to detect and classify typical sensor errors such as erratic, drift, hard-over, spike, and stuck faults. Time-domain statistical features are utilized for the learning and testing in the proposed scheme, and the genetic algorithm is utilized to select the subset of optimal features. To classify multiple sensor faults, a multi-layer SVM is utilized, and ensemble technique is used for CNN. As a result, the SVM that utilizes a subset of features selected by the genetic algorithm provides better performance than the SVM that utilizes all the features. However, the performance of CNN is superior to that of the SVM.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.4
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• pp.37-47
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• 2016

The practical constraints on the commercial FPGAs which contain dedicated wide function multiplexers in their slice structure are incorporated with one of the most advanced FPGA mapping algorithms based on the AIG (And-Inverter Graph), one of the best logic representations in academia. As the first step of the mapping process, cuts are enumerated as intermediate structures. And then, the cuts which can be mapped to the multiplexers are recognized. Without any increased complexity, the delay and area of multiplexers as well as LUTs are calculated after checking the requirements for the tree construction such as symmetry and depth limit against dynamically changing mapping of neighboring nodes. Besides, the root positions of multiplexer trees are identified from the RTL code, and annotated to the AIG as AOs (Auxiliary Outputs). A new AIG embedding the multiplexer tree structures which are intentionally synthesized by Shannon expansion at the AOs, is overlapped with the optimized AIG. The lossless synthesis technique which employs FRAIG (Functionally Reduced AIG) is applied to this approach. The proposed approach and techniques are validated by implementing and applying them to two RISC processor examples, which yielded 13~30% area reduction, and up to 32% delay reduction. The research will be extended to take into account the constraints on the dedicated hardware for carry chains.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.9
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• pp.18-25
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• 2016

In D2D communications underlaying a multicell network, it is of primary importance to ensure coexistence of cellular links and D2D links with minimal interference. Therefore, resource allocation scheme for D2D links should be designed to limit the interference between cellular links and D2D links. In this paper, we propose an effective resource allocation scheme for multiple D2D links which share the uplink spectrum resource with cellular users in a multicell network. Under the assumption that the locations of users are known to the base station, the proposed scheme allocates cellular resources to D2D links, such that the interference between a cellular link and multiple D2D links is minimized. In particular, we compute two constants from the path loss model and then use the constants to protect both cellular and D2D links. Simulation results are provided to verify the performance of the proposed scheme.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.4
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• pp.75-87
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• 2010

For two input-protection schemes suitable for RF ICs utilizing the thyristor and diode protection devices, which can be fabricated in standard CMOS processes, we attempt an in-depth comparison on HBM ESD robustness in terms of lattice heating inside protection devices and peak voltages developed across gate oxides in input buffers, based on DC, mixed-mode transient, and AC analyses utilizing a 2-dimensional device simulator. For this purpose, we construct an equivalent circuit for an input HBM test environment of a CMOS chip equipped with the input ESD protection circuits, which allows mixed-mode transient simulations for various HBM test modes. By executing mixed-mode simulations including up to six active protection devices in a circuit, we attempt a detailed analysis on the problems, which can occur in real tests. In the procedure, we suggest to a recipe to ease the bipolar trigger in the protection devices and figure out that oxide failure in internal circuits is determined by the junction breakdown voltage of the NMOS structure residing in the protection devices. We explain the characteristic differences of two protection schemes as an input ESD protection circuit for RF ICs, and suggest valuable guidelines relating design of the protection devices and circuits.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.4
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• pp.15-25
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• 2012

The research on the FPGA CAD tools in academia has been lacking practicality due to the underlying FPGA fabric architecture which is too simple and inefficient to be applied for commercial FPGAs. Recently, the database of placement positions and routing graphs on commercial FPGA architectures has been built, and provided for enabling the academic development of placement and routing tools. To extend the limit of academic CAD tools even further, we have developed the evaluation toolkit for the K-FPGA architecture which is under development. By providing interface for exchanging data with a commercial FPGA toolkit at every step of mapping, packing, placement and routing in the tool chain, the toolkit enables individual tools to be developed without waiting for the results of the preceding step, and with no dependency on the quality of the results, and compared in detail with commercial tools at any step. Also, the fabric primitive library is developed by extracting the prototype from a reporting file of a commercial FPGA, restructuring it, and modeling the behavior of basic gates. This library can be used as the benchmarking target, and a reference design for new FPGA architectures. Since the architecture is described in a standard HDL which is familiar with hardware designers, and read in the tools rather than hard coded, the tools are "data-driven", and tolerable with the architectural changes due to the design space exploration. The experiments confirm that the developed library is correct, and the functional correctness of applications implemented on the FPGA fabric can be validated by simulation. The placement and routing tools are under development. The completion of the toolkit will enable the development of practical FPGA architectures which, in return, will synergically animate the research on optimization CAD tools.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.10
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• pp.185-190
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• 2007

In this paper, minimum sampling rates and method of nonlinear characterization were suggested for low power, quasi-memoryless PAs. So far, the Nyquist rate of the input signal has been used for nonlinear PA modeling, and it is burdening Analog-to-digital converters for wideband signals. This paper shows that the input Nyquist rate sampling is not a necessary condition for successful modeling of quasi-memoryless PAs. Since this sampling requirement relives the bandwidth requirements for Analog-to-digital converters (ADCs) for feedback paths in digital pre-distortion systems, relatively low-cost ADcs can be used to identify nonlinear PAs for wideband signal transmission, even at severe aliasing conditions. Simulation results show that a generic memoryless nonlinear RF power amplifier with AMAM and AMPM distortion can be successfully identified at any sampling rates. Measurement results show the modeling error variation is less than 0.8dB over any sampling rates.

• Journal of the Korea Society of Computer and Information
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• v.17 no.10
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• pp.145-154
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• 2012

Recently, the cardiovascular disease has increased by causes such as westernization dietary life, smoking, and obesity. In particular, the acute myocardial infarction (AMI) occupies 50% death rate in cardiovascular disease. Following this trend, the AMI has been carried out a research for discovery of risk factors based on national data. However, there is a lack of diagnosis minor suitable for Korean. The objective of this paper is to develop a classifier for short-term relapse mortality prediction of cardiovascular disease patient based on prognosis data which is supported by KAMIR(Korea Acute Myocardial Infarction). Through this study, we came to a conclusion that ANN is the most suitable method for predicting the short-term relapse mortality of patients who have ST-segment elevation myocardial infarction. Also, data set obtained by logistic regression analysis performed highly efficient performance than existing data set. So, it is expect to contribute to prognosis estimation through proper classification of high-risk patients.

• Journal of the Korea Society of Computer and Information
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• v.16 no.9
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• pp.57-68
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• 2011

Self-healing is an approach to evaluating constraints defined in target system and to applying an appropriate strategy when violating the constrains. Today, the computing environment is very complex, so researches that endow a system with the self-healing's ability that recognizes problem arising in a target system are being an important issues. However, most of the existing researches are that self-healing developers need much effort and time to analyze and model constraints. Thus, in order to improve these problems, this paper proposes the method that automatically generates monitoring module by using UML models for self-healing. The approach proposes: 1) defining system knowledge required for self-healing from UML model, 2) process for generating monitor, by using monitor generated, and process for monitoring the problems. Through these, we can reduce the efforts of self-healing developers to analyze target system, and secure monitoring scope based on information of system knowledge. Also we can minimize the efforts to develop the monitoring environment automatically. to evaluate the proposed approach, we apply proposed approach to ATM prototype system for qualitative result, and perform quantitative evaluation through video conference system in our existing research.

• Journal of the Korean Society for Nondestructive Testing
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• v.35 no.2
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• pp.112-119
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• 2015

Photoacoustic microscopy is capable of providing high-resolution molecular images, and its spatial resolution is typically determined by ultrasonic transducers used to receive the photoacoustic signals. Therefore, ultrasonic transducers for photoacoustic microscopy (PAM) should have a high operating frequency, broad bandwidth, and high signal-reception efficiency. Polyvinylidene fluoride (PVDF) is a suitable material. To take full advantage of this material, the selection of the backing material is crucial, as it influences the center frequency and bandwidth of the transducer. Therefore, we experimentally determined the most suitable backing material among EPO-TEK 301, E-Solder 3022, and RTV. For this, three PVDF high-frequency single-element transducers were fabricated with each backing material. The center frequency and -6 dB bandwidth of each transducer were ascertained by a pulse-echo test. The spatial resolution of each transducer was examined using wire-target images. The experimental results indicated that EPO-TEK 301 is the most suitable backing material for a PAM transducer. This material provides the highest signal magnitude and a reasonable bandwidth because a large portion of the energy propagates toward the front medium, and the PVDF resonates in the half-wave mode.

• Journal of Physiology & Pathology in Korean Medicine
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• v.17 no.5
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• pp.1257-1263
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• 2003

The modified engineering methodology and the modified electronic circuit in classical ultrasonic principles were applied to ultrasonic aerosol nebulizer for inhalation toxicology study of cadmium aerosol. 1532.96ppm Cd nebulizing solution was used to generate cadmium aerosol for particle size analysis with the modifying source and inlet temperatures. The results of particle size analysis for cadmium aerosol were as following. The highest particle counting for source temperature 20℃ was 399.75 × 10² in inlet temperature 100℃ and particle diameter 0.75㎛. The highest particle counting for source temperature 50℃ was 399.70 × 10² in inlet temperature 50℃ and particle diameter 0.75㎛. The highest particle counting for source temperature 70℃ was 411.14 × 10² in inlet temperature 100℃ and particle diameter 0.75㎛. The ranges of geometric mean diameter were 0.74-0.79㎛ in source temperature 20℃, 0.65-0.72㎛ in source temperature 50℃, and 0.65-0.80㎛ in source temperature 70℃. The smallest geometric mean diameter was 0.65㎛ in source temperature 50, 70℃ and inlet temperature 20, 50℃, and the largest geometric mean diameter was 0.80㎛ in source temperature 70℃ and inlet temperature 100℃. The ranges of geometric standard deviation were 1.71-1.80 in source temperature 20℃, 1.27-1.61 in source temperature 50℃, and 1.27-2.29 in source temperature 70℃. The lowest geometric standard deviation was 1.27 in source temperature 50, 70℃ and inlet temperature 20, 50℃, and the highest geometric standard deviation was 2.29 in source temperature 70℃ and inlet temperature 100℃. Generated aerosol for cadmium inhalation toxicology study was polydisperse aerosol with the above geometric standard deviation 1.2. The ranges of mass median diameter(MMD) were 1.75-2.25㎛ in source temperature 20℃, 1.27-1.61㎛ in source temperature 50℃, and 1.27-2.29㎛ in source temperature 70℃. The smallest MMD was 1.27㎛ in source temperature 50, 70℃ and inlet temperature 20, 50℃, and the largest MMD was 2.29㎛ in source temperature 70℃ and inlet temperature 100℃. Cadmium chloride concentration in nebulizing solution affected the particle size and distribution of cadium aerosol in air. MMO for inhalation toxicology testing in OECD and EU is less than 3㎛ and EPA guidance is less than 4㎛. In our results, in source temperatures of 20, 50, 70℃, and inlet temperatures of 20, 50, 100, 150, 200, 250℃ were conformed to the those guidance.