• 제목/요약/키워드: Electrochemical Etching(ECE)

검색결과 5건 처리시간 0.022초

미세 레이저 가공의 표면코팅 후 전해 에칭 (Laser Micro Machining and Electrochemical Etching After Surface Coating)

  • 김태풍;박민수
    • 한국정밀공학회지
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    • 제30권6호
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    • pp.638-643
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    • 2013
  • Laser beam machining (LBM) is fast, contactless and able to machine various materials. So it is used to cut metal, drill holes, weld or pattern the imprinted surface. However, after LBM, there still leave burrs and recast layers around the machined area. In order to remove these unwanted parts, LBM process often uses electrochemical etching (ECE). But, the total thickness of workpiece is reduced because the etching process removes not only burrs and recast layers, but also the entire surface. In this paper, surface coating was performed using enamel after LBM on metal. The recast layer can be selectively removed without decreasing total thickness. Comparing with LBM process only, the surface quality of enamel coating process was better than that. And edge shape was also maintained after ECE.

레이저 빔 가공과 전해 에칭을 이용한 미세 가공 (Micromachining Using Laser Beam Machining and Electrochemical Etching)

  • 김장우;권민호;정도관;주종남
    • 한국정밀공학회지
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    • 제29권10호
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    • pp.1089-1095
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    • 2012
  • Laser beam machining (LBM) using nanosecond pulsed laser is widely known to be rapid and non-wear process for micromachining. However, the quality itself cannot meet the precision standard due to the recast layer and heat affected zone. In this paper, a fabrication method for machining micro features in stainless steel using a hybrid process of LBM using nanosecond pulsed laser and electrochemical etching (ECE) is reported. ECE uses non-contacting method for precise surface machining and selectively removes the recast layer and heat affected zone produced by laser beam in an effective way. Compared to the single LBM process, the hybrid process of LBM and ECE enhanced the quality of the micro features.

저가격 박막 실리콘 기판을 위한 단결정 실리콘 웨이퍼에 layer transfer 형성 연구 (Cost down thin film silicon substrate for layer transfer formation study)

  • 권재홍;김동섭;이수홍
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2004년도 춘계학술대회 논문집 반도체 재료 센서 박막재료 전자세라믹스
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    • pp.85-88
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    • 2004
  • Mono-crystalline silicon(mono-Si) is both abundant in our environment and an excellent material for Si device applications. However, single crystalline silicon solar cell has been considered to be expensive for terrestrial applications. For that reason, the last few years have seen very rapid progress in the research and development activities of layer transfer(LT) processes. Thin film Si layers which can be detached from a reusable mono-Si wafers served as a substrate for epitaxial growth. The epitaxial films have a very high efficiency potential. LT technology is a promising approach to reduce fabrication cost with high efficiency at large scale since expensive Si substrate can be recycled. Low quality Si can be used as a substrate. Therefore, we propose one of the major technologies on fabricating thin film Si substrate using a LT. In this paper, we study the LT method using the electrochemical etching(ECE) and solid edge.

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다공성 실리콘 반사방지막의 최적 반사율을 적용한 다결정 실리콘 태양전지 (Optimization of Porous Silicon Reflectance for Multicrystalline Silicon Solar Cells)

  • 권재홍;김동섭;이수홍
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2004년도 하계학술대회 논문집 Vol.5 No.1
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    • pp.146-149
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    • 2004
  • Porous silicon(PS) as an excellent light diffuser can be used as an antireflection layer without other antireflection coating(ARC) materials. PS layers were obtained by electrochemical etching(ECE) anodization of silicon wafers in hydrofluoric acid/ethanol/de-ionized(DI) water solution($HF/EtOH/H_2O$). This technique is based on the selective removal of Si atoms from the sample surface forming a layer of PS with adjustable optical, electrical, and mechanical properties. A PS layer with optimal ARC characteristics was obtained in charge density (Q) of 5.2 $C/cm^2$. The weighted reflectance is reduced from 33 % to 4 % in the wavelength between 400 and 1000 nm. The weighted reflectance with optimized PS layers is much less than that obtained with a commercial SiNx ARC on a potassium hydroxide(KOH) pre-textured multi-crystalline silicon(mc-Si) surface.

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유기 박막 트랜지스터 회로를 위한 섀도 마스크의 제작 (Fabrication of a shadow mask for OTFT circuit)

  • 이상민;박민수;이영수;이해성;주종남
    • 한국정밀공학회:학술대회논문집
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    • 한국정밀공학회 2005년도 춘계학술대회 논문집
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    • pp.1277-1280
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    • 2005
  • A high-aspect-ratio and high-resolution stainless steel shadow mask for organic thin-film transistors (OTFTs) circuit has been fabricated by a new method which combines photochemical machining, micro-electrical discharge machining (micro-EDM), and electrochemical etching (ECE). First, connection lines and source-drain holes are roughly machined by photochemical etching, and then the part of source and drain holes is finished by the combination of micro-EDM and ECE processes. Using this method a $100\;\mu{m}$ thick stainless steel (AISI 304) shadow mask for inverter can be fabricated with the channel length of $30\;\mu{m}\;and\;10\;\mu{m}\;respectively.\;The\;width\;of\;connection line\;is\;150\;\mu{m}$. The aspect ratio of the wall is about 5 and 15, respectively. Metal lines and source-drain electrodes of OTFTs were successfully deposited through the fabricated shadow mask.

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