• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1995.11a
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• pp.118-121
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• 1995

Fabrication and a new analytical expression for the capacitance characteristics of hydrogenerated amorphous silicon thin film transistors(a-Si:H TFTs) is presented and experimentally verified. The results show that the experimental capacitance characteristics are easily measeured. Measured transfer and DC output characteristic curves of a-Si:H TFT are similar to those of the standard MOSFET-IC. The capacitances on bias voltages are in good agreement with experimental data. This capacitance characteristics is suitable for incorporation into a circuit simulator and can be used for computer-aided design of a-Si thin film transistor integrated circuits.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1996.05a
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• pp.299-303
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• 1996

In this Study, the capacitance-voltage properties of the (Sr$\_$1-x/$.$Ca$\_$x/)$\_$m/TiO$_3$(0.05$\leq$x$\leq$0.2, m=0.996, 1, 1.004) ceramics were investigated. The results of the capacitance-voltage measurements indicated that the grain boundary was composed of the continuous insulating layers. The capacitance is almost unchanged below about 20[V] but it decreases slowly about 20[V]. The thick of the effective depleation layer was calculated by using the average grain size, it was in the range of 760∼3400[${\AA}$].

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.10
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• pp.887-891
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• 2003

In this paper, two filters with center frequency of 19.58MHz were cascaded and its bandwidth characteristics were investigated with the variations of coupling capacitance for intermediate frequency (IF) bandpass filter application. The cascaded filter showed the higher stop region, reduction of spurious response and increase of selectivity. With the increase of coupling capacitance, insertion loss was increased but spurious response reduced. The cascaded filter with coupling capacitance of 15pF showed insertion loss of 5.643dB, 3dB bandwidth of 55.089kHz and 20dB bandwidth of 83.608kHz, respectively.

• Journal of the Korean Ceramic Society
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• v.46 no.2
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• pp.219-223
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• 2009

Effects of MgO or $R_2O_3$(R:Dy, Ho, Yb) on the capacitance aging behavior of multilayer ceramic capacitors (MLCCs) based on $BaTiO_3$ dielectrics under DC electrical fields has been studied. At a DC field of 1 $V{/\mu}m$, the capacitance of MLCC specimens dropped immediately in a very short period (<10 s, the first stage) and then decreased continuously with time (the second stage). Mn doping significantly increased the aging rate in the second stage. The addition of MgO or $R_2O_3$ notably decreased the second stage aging rate of Mn-doped specimens. Yb doping gives rise to the lowest aging rate in the second stage, which is due to the larger population of defect dipoles associated with oxygen vacancies.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.48 no.9
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• pp.676-680
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• 1999

To do breath alcohol measurement, a sensor is necessary that it can detect low alcohol gas concentration of 0.01% at least. In this work, a capacitance-type alcohol gas sensor using porous silicon layer is developed to measure low alcohol gas concentration. The sensor using porous silicon layer has some sensitivity at room temperature by very large effective surface area, but there is still much room for improvement. In this experiment, we measured the capacitance of the sensor under 254 nm UV light on the porous silicon layer, in which alcohol solution was kept in a flask at 25, 35, and $45^{\circ}C$ by a heater. As the result, the improvement of sensitivity by illuminating UV light was observed. The increasing rate of the capacitance was shown to be double more than those measured under UV-off state. It is supposed that UV light activates response of the oriental and interfacial polarizations which have slow relaxation time for AC field.

• Journal of the Korean Institute of Telematics and Electronics
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• v.22 no.5
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• pp.57-61
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• 1985

The e(lect of capacitance error on the A/D conversion accuracy in the A/D converter using binary-weighted capacitor array was scruntized. Besides the Monte-Carlo method considering the inter-capacitance ratios as random variables, " correlation approach" con-sidering the correlation coefficient between capacitances is proposed in this paper. Bt was observed by the measurement of capacitances of monolithic MO5 capacitors that the correla-tion coefficient between capacitors decreases as the capacitor size incrrases. It was also verified that the parallel connection of unit capacitors and the common centroid layout scheme signi(icantly increase the inter-capacitance correlation coefficients.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1999.05a
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• pp.399-402
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• 1999

In this paper, a new method for calculating capacitance in arbitrarily shape structure is Presented. This new approach based on divergence theorem of Gauss\`s law is acheive by Surface-Contacted Element(SCE) for Gaussian surface. To evaluate accurate capacitance value in nonuniform electric field. in two dimensional analysis the interpolation using the elements which contact one nod (PE: Point-Element) or two nod (FE: Face-Element) is employed. Because the elements contacted with surface are very small compared with total elements in analytic model, SCE method has shorter computing time to calculate capacitance. This proposed method is verified by comparing the simulated results with value obtained by analytic method.

• KIEE International Transactions on Electrophysics and Applications
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• v.5C no.6
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• pp.242-245
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• 2005

We compared and analyzed ASER (Accelerated Soft Error Rate) for cell structures and metal plate capacitance in the fabricated 16M SRAM. Application of the BNW (Buried NWELL) lowered the ASER value compared to the normal well structure. By applying the metal plate capacitor with the BNW, the lowest ASER value can be obtained. The thinner oxide thickness of the metal plate capacitor provides higher capacitance and lower ASER value. The ASER is improved from 2200 FIT to 1000 FIT after sole application of the BNW. However, it is dramatically improved to 15 FIT once the metal plate capacitor is additionally applied.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.11a
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• pp.34-37
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• 2001

In this study, the capacitance-voltage properties of (Sr$_{1-x}$ .Ca$_{x}$)TiO$_3$(0.05$\leq$x$\leq$0.20)-based grain boundary layer ceramics were investigated. The ceramics were fabricated by the conventional mixed oxide method. The sintering temperature and time were 1480~150$0^{\circ}C$ and 4 hours, respectively. The 2nd phase formed by the thermal diffusion of CuO from the surface leads to very excellent dielectric properties, that is, $\varepsilon$$_{r}$>50000, tan$\delta$<0.05, $\Delta$C<$\pm$10%. The capacitance is almost unchanged below about 20[V] but it decreases slowly about 20[V]. The results of the capacitance-voltage properties indicated that the grain boundary was composed of the continuous insulating layers.ulating layers.s.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.59 no.4
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• pp.378-383
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• 2010

Due to the large capacity and low cost, DC link electrolytic capacitors with of energy storage and voltage regulation are used for almost all types of power converter as the DC/AC inverter or DC/DC converter. Electrolytic capacitor, which is the most of the time affected by the aging effect, plays very important role for the power converter system quality and reliability. Therefore, this paper proposes a simple method to estimate the capacitance variation of an electrolytic capacitor in order to analyze the internal characteristic decrease and worn-out state of an electrolytic capacitor. Simulation results by using capacitor storage energy computation show the validity of the proposed capacitance estimation method.