• Proceedings of the KIPE Conference
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• 2002.07a
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• pp.399-402
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• 2002

In this paper, the novel method is proposed to measure the capacitance of the dc link capacitor Advantage of the method is not to separate capacitor from 3-phase AC/DC/AC converters. In the proposed method, a specific low frequency current is injected to oscillate the voltage of dc capacitor at no load condition. The capacitance of dc capacitor is calculated with the effective values of this ripple voltage and current. The validity of the proposed method is confirmed by PSIM simulation.

• Journal of the Korean Ceramic Society
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• v.33 no.1
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• pp.35-40
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• 1996

The influence of grain boundary on the electrical properties of WO3-doped SrTiO3 ceramics has been investi-gated. From the result resistivity and capacitance of grains and boundaries were obtained by employing impedance spectrocopy. And the temperature dependance of capacitance of WO3-doped SrTiO3. was influenced directly by the variation of grain boundary capacitance. It was also found by impedance spectroscopy that the dispersion frequency characteristics showed discernibly that the resistivity of the specimen varied with WO3 content.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.28 no.11
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• pp.93-99
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• 2014

The method of moments is applied to numerically compute the electrostatic capacitance of a parallel-plate rectangular capacitor of finite area. Each plate is discretized into 900 patches per unit area to ensure a high accuracy of computation. To further enhance computational results, the impedance matrix elements are additionally evaluated in the case that the observation patch is located above or below the source patch in the vertical direction. To examine the fringing effect at the edges of the capacitor, the normalized capacitances are computed as a function of separation distance. After these results have been verified by Palmer's formula, this method is extended to the computation of capacitances between two different size plates.

• Journal of Power Electronics
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• v.13 no.1
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• pp.94-103
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• 2013

A capacitor deterioration of LCL-filter grid-connected PWM converters is progressed by the self-healing mechanism. It leads to the degradation of the filter performance and drop of power factor. Thus, it is required to diagnose fault-point of capacitors and determine the replacement time. Typically, the fault of capacitors is determined when the capacitance is reduced up to 80% from initial value. This paper proposes algorithm to the determine capacitor replacement time of an LCL filter. The algorithm takes the advantage of change of the response on the injected resonant frequency corresponding to 80% value from the initial capacitance. The results of the algorithm are demonstrated through simulations and experiments.

• Proceedings of the KIPE Conference
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• 2013.07a
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• pp.1-2
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• 2013

In this paper, we inject input currents having $3^{rd}$ harmonic to reduce the capacitance of DC link capacitors in single-phase converters. If the input current with third harmonic is injected, the required capacitance can be reduced by minimizing the difference between the input and output power. To control the input current, instead of PI control done in rotating frame, PR controller is used with the proposed separate current control method for fundamental and $3^{rd}$ harmonic components. The validity of the proposed method has been demonstrated by simulation results.

• Proceedings of the KIPE Conference
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• 2002.11a
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• pp.125-128
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• 2002

In this paper, a novel on-line do capacitance estimation method for the PWM converter is proposed. At no load, Input current at a low frequency is injected, which causes do voltage ripple. With the ac voltage and current ripple components of the dc side, the capacitance can be calculated. Experimental result shows that the estimation error is less than $2\%$.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.25 no.12
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• pp.949-954
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• 2012

The K-PCS and W-CDMA dual band dielectric duplexer and bandpass filters have been designed and fabricated. The dual band duplexer consists of the separate monoblock K-PCS and W-CDMA duplexers using common antenna port. The coupling capacitance and I/O impedance matching have been designed to minimize the cross interference between the bands. Isolations of crosspoint between Tx and Rx in K-PCS and W-CDMA dualband were about 47 dB and 100 dB, respectively. On the other hand, isolations of Tx and Rx in K-PCS and W-CDMA were about 66 dB and 65 dB, respectively. The difference between 47 dB and 100 dB originated from the different center frequencies in Tx and Rx of K-PCS and W-CDMA bands. The coupling capacitance of the bandwidth, I/O capacitance of I/O matching and impedance matching, and various capacitances were important role to fabricate the dielectric duplexer and bandpass filters.

• Structural Monitoring and Maintenance
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• v.3 no.4
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• pp.377-393
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• 2016

The present work develops an expert system for detecting and predicting the crude oil types and properties at normal temperature ${\theta}=25^{\circ}C$, by evaluating the dielectric properties of the fluid transfused inside glass fiber reinforced epoxy (GFRE) composite pipelines, by using electrical capacitance sensor (ECS) technique, then used the data measurements from ECS to predict the types of the other crude oil transfused inside the pipeline, by designing an efficient artificial neural network (ANN) architecture. The variation in the dielectric signatures are employed to design an electrical capacitance sensor (ECS) with high sensitivity to detect such problem. ECS consists of 12 electrodes mounted on the outer surface of the pipe. A finite element (FE) simulation model is developed to measure the capacitance values and node potential distribution of ECS electrodes by ANSYS and MATLAB, which are combined to simulate sensor characteristic. Radial Basis neural network (RBNN), structure is applied, trained and tested to predict the finite element (FE) results of crude oil types transfused inside (GFRE) pipe under room temperature using MATLAB neural network toolbox. The FE results are in excellent agreement with an RBNN results, thus validating the accuracy and reliability of the proposed technique.

• Electrical & Electronic Materials
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• v.9 no.5
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• pp.476-482
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• 1996

The multi-dielectric layer SiO$_{2}$/Si$_{3}$N$_{4}$/SiO$_{2}$(ONO) is used to improve electrical capacitance and to scale down the memory device. In this paper, improvement of the capacitance by reducing the bottom oxide thickness in the nitride deposition with load lock(L/L) vacuum system is studied. Bottom oxide thickness under the nitride layer is measured by ellipsometer both in L/L and non-L/L systems. Both results are in the range of 3-10.angs. and 10-15.angs., respectively, independent of the nitride and top oxide thickness. Effective thickness and cell capacitance for SONOS capacitor are in the range of 50-52.angs. and 35-37fF respectively in the case of nitride 70.angs. in L/L vacuum system. Compared with non-L/L system, the bottom oxide thickness in the case of L/L system decreases while cell capacitance increases about 4 fF. The results obtained in this study are also applicable to ONO scaling in the thin bottom oxide region of memory stacked capacitor.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.4
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• pp.462-470
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• 2015

In this study, we analyze the impacts of the trapezoidal fin shape of a double-gate FinFET on the electrical characteristics of circuits. The trapezoidal nature of a fin body is generated by varying the angle of the sidewall of the FinFET. A technology computer-aided-design (TCAD) simulation shows that the on-state current increases, and the capacitance becomes larger, as the bottom fin width increases. Several circuit performance metrics for both digital and analog circuits, such as the fan-out 4 (FO4) delay, ring oscillator (RO) frequency, and cut-off frequency, are evaluated with mixed-mode simulations using the 3D TCAD tool. The trapezoidal nature of the FinFET results in different effects on the driving current and gate capacitance. As a result, the propagation delay of an inverter decreases as the angle increases because of the higher on-current, and the FO4 speed and RO frequency increase as the angle increases but decrease for wider angles because of the higher impact on the capacitance rather than the driving strength. Finally, the simulation reveals that the trapezoidal angle range from $10^{\circ}$ to $20^{\circ}$ is a good tradeoff between larger on-current and higher capacitance for an optimum trapezoidal FinFET shape.