• 제목/요약/키워드: Electrical Units

검색결과 711건 처리시간 0.024초

Fault-Tolerant Control of Cascaded H-Bridge Converters Using Double Zero-Sequence Voltage Injection and DC Voltage Optimization

  • Ji, Zhendong;Zhao, Jianfeng;Sun, Yichao;Yao, Xiaojun;Zhu, Zean
    • Journal of Power Electronics
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    • 제14권5호
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    • pp.946-956
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    • 2014
  • Cascaded H-Bridge (CHB) converters can be directly connected to medium-voltage grids without using transformers and they possess the advantages of large capacity and low harmonics. They are significant tools for providing grid connections in large-capacity renewable energy systems. However, the reliability of a grid-connected CHB converter can be seriously influenced by the number of power switching devices that exist in the structure. This paper proposes a fault-tolerant control strategy based on double zero-sequence voltage injection and DC voltage optimization to improve the reliability of star-connected CHB converters after one or more power units have been bypassed. By injecting double zero-sequence voltages into each phase cluster, the DC voltages of the healthy units can be rapidly balanced after the faulty units are bypassed. In addition, optimizing the DC voltage increases the number of faulty units that can be tolerated and improves the reliability of the converter. Simulations and experimental results are shown for a seven-level three-phase CHB converter to validate the efficiency and feasibility of this strategy.

휴대 단말기용 3D Graphics Lighting Processor 설계 (A Design of 3D Graphics Lighting Processor for Mobile Applications)

  • 양준석;김기철
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2005년도 추계종합학술대회
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    • pp.837-840
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    • 2005
  • This paper presents 3D graphics lighting processor based on vector processing using pipeline chaining. The lighting process of 3D graphics rendering contains many arithmetic operations and its complexity is very high. For high throughput, proposed processor uses pipelined functional units. To implement fully pipelined architecture, we have to use many functional units. Hence, the number of functional units is restricted. However, with the restricted number of pipelined functional units, the utilization of the units is reduced and a resource reservation problem is caused. To resolve these problems, the proposed architecture uses vector processing using pipeline chaining. Due to its pipeline chaining based architecture, it can perform 4.09M vertices per 1 second with 100MHz frequency. The proposed 3D graphics lighting processor is compatible with OpenGL ES API and the design is implemented and verified on FPGA.

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리튬이온 배터리의 SOC 제어가 가능한 단상 멀티레벨 컨버터 시뮬레이션 (The Simulation of Single Phase Multi-Level Converter which can control the SOC of Lithium-Ion Battery Units)

  • 김재홍;김일환
    • 조명전기설비학회논문지
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    • 제25권6호
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    • pp.122-128
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    • 2011
  • This paper proposes a new control scheme of lithium ion battery units based on single phase multi-level converter. In the DC/AC converter applications using battery storage system, it is necessary to control the balancing voltage of individual battery units for high efficiency utilization. Using the proposed control scheme, the DC/AC single phase converter system is applied. To verify the effectiveness of the proposed control scheme, computer simulation is accomplished. In the computer simulation, lithium-ion battery units and single phase multi-level converter system are modeled and carried out using Psim simulation program. It will be helpful for design and applications of energy storage system with lithium-ion battery.

15 kVA급 박막형 초전도 전류제한기의 한류특성 (Characteristics of 15 kVA Superconducting Fault Current Limiters Using Thin Films)

  • 최효상;현옥배;김혜림;황시돌
    • 한국전기전자재료학회논문지
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    • 제13권12호
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    • pp.1058-1062
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    • 2000
  • We investigated resistive superconducting fault current limites (SFCLs) fabricated using YBCO thin films on 2-inch diameter sapphire substrates. Nearly identical SFCL units were prepared and tested. The units were connected in series and parallel to increase the current and voltage ratings. A serial connection of the units showed significantly unbalanced power dissipation between the units. This imbalance was removed by introducing a shunt resistor to the firstly quenched unit. Parallel connection of the units increased the current rating. An SFCL module of 4 units in parallel, each of which has minimum quench current rating. An SFCL module of 4 units in parallel, each of which has minimum quench current 25 A$\_$peak/, was produced and successfully tested at a 220 V$\_$rms/circuit. From the resistance increase, we estimated that the film temperature increased to 200 K in 5 msec, and 300 K in 120 msec. Successive quenches revealed that this system is stable without degradation in the current limiting capability under such thermal shocks as quenches at 220 V$\_$rms/.

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도시철도차량 전선에 대한 열화진단 방법 고찰 (A Study on Deterioration Diagnostic Method for Electrical Wires of Electric Multiple Units)

  • 홍용기;정종덕;편장식
    • 한국철도학회:학술대회논문집
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    • 한국철도학회 2009년도 춘계학술대회 논문집
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    • pp.680-687
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    • 2009
  • Several kinds of Electrical Wires have been used in Electric Multiple Units(EMU) for the supply of electric power, supervision, and the propagation of control signals. These Electrical Wires must be inspected for safe and stable operation of EMU. The degradation diagnosis to estimate the integrity of Electrical Wires has recently been requested according to the long use of EMU. This paper describes on application of diagnosis method for EMU.

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분리형과 일체형 리액터에 따른 매트릭스형 초전도 한류기의 외부자장 의존성 연구 (Dependence of External Magnetic Field in the Matrix-Type SFCL with the Separated or the Integrated Reactors)

  • 조용선;최효상;정병익;고성필
    • 전기학회논문지
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    • 제60권4호
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    • pp.880-884
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    • 2011
  • The matrix-type superconducting fault current limiter (MSFCL) consists of the trigger and current-limiting parts. The trigger part with reactors connected in parallel improves the quenching characteristics by applying the external magnetic field into the superconducting units. The current-limiting part with superconducting units connected in parallel and shunt reactors connected in series limit the fault current when the fault occurs. We developed the integrated reactor with the trigger and the current-limiting parts to apply high external magnetic field into the superconducting units. This was composed of a superconducting unit for the trigger part and two superconducting units for the current-limiting parts. We confirmed that the external magnetic field generated in the MSFCL with an integrated reactor was larger than that of the MSFCL with the separated reactors. So the differences of voltages generated between superconducting units were decreased in the difference according to the increment of the applied voltage. The whole magnitude of the SFCL was reduced because the volume of an integrated reactor could be reduced by one-third than that of the separated reactors. We confirmed that the critical behavior between the superconducting units in the MSFCL with an integrated reactor was more improved than that of the MSFCL with the separated reactors.

우리말 규칙합성에 관한 연구 (II) - 반음절 단위의 음성합성 (Synthesis-by-rule of Korean: Part II - Speech Synthesis Using the Units of Demisyllables)

  • 천강식;이성준;이재홍
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1988년도 전기.전자공학 학술대회 논문집
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    • pp.29-32
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    • 1988
  • A new set of the units of demi-syllables is presented for Korean speech synthesis. The performance of the set of demi-syllable units is compared with that of the set of syllable units in the aspects of the quality of synthesized speech using each set of the units and the size of the computer memory which each set of units occupies. The set of demi-syllable units achieves comparable speech quality and occupies smaller memory size than the set of syllable units.

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한정된 연산유닛에서 명령어 종속성을 이용하는 수퍼스칼라 프로세서의 이론적 성능 모델 (A Theoretical Superscalar Microprocessor Performance Model with Limited Functional Units Using Instruction Dependencies)

  • 이종복
    • 전기학회논문지
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    • 제59권2호
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    • pp.423-428
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    • 2010
  • In the initial design phase of superscalar microprocessors, a performance model is necessary. A theoretic performance model is very useful since performance for various architecture parameters can be obtained by simply computing equations, without repeating simulations, Previous studies established theoretic performance models using the relation between the instruction window size and the issue width, with the penalties due to branch mispredictions and cache misses. However, the study was intended for unlimited number of functional units, which is insufficient for the real case application. This paper proposes a superscalar microprocessor theoretical performance model which also works for the limited functional units. To enhance the accuracy of our limited functional unit model, instruction dependency rates are employed. By using trace-driven data of SPEC 2000 integer programs as input, this paper shows that the theoretically computed performance of superscalar microprocessor with limited number of functional units is quite similar to the measured performance.

A Hidden Markov Model Imbedding Multiword Units for Part-of-Speech Tagging

  • Kim, Jae-Hoon;Jungyun Seo
    • Journal of Electrical Engineering and information Science
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    • 제2권6호
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    • pp.7-13
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    • 1997
  • Morphological Analysis of Korean has known to be a very complicated problem. Especially, the degree of part-of-speech(POS) ambiguity is much higher than English. Many researchers have tried to use a hidden Markov model(HMM) to solve the POS tagging problem and showed arround 95% correctness ratio. However, the lack of lexical information involves a hidden Markov model for POS tagging in lots of difficulties in improving the performance. To alleviate the burden, this paper proposes a method for combining multiword units, which are types of lexical information, into a hidden Markov model for POS tagging. This paper also proposes a method for extracting multiword units from POS tagged corpus. In this paper, a multiword unit is defined as a unit which consists of more than one word. We found that these multiword units are the major source of POS tagging errors. Our experiment shows that the error reduction rate of the proposed method is about 13%.

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산업용 열병합발전시스템에서 진화 알고리즘을 이용한 합리적 운전계획 수립에 관한 연구 (A Rational Operation Scheduling Using Evolutionary Algorithm on Industrial Cogeneration System)

  • 최광범;정지훈;이종범
    • 대한전기학회논문지:전력기술부문A
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    • 제49권10호
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    • pp.494-501
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    • 2000
  • This paper describes a strategy of a daily optimal operational scheduling in cogeneration system for paper mill. The cogeneration system selected to establish the scheduling consists of three units and several auxiliary devices. One unit generates electrical and thermal energy using the back pressure turbine. The rest two units generate the energy using the extraction condensing turbine. Three auxiliary boilers, two waste boilers and three sludge incinerators operate to supply energy to the loads with three units. The cogeneration system is able to supply enough the thermal energy to the thermal load, however it can not sufficiently supply the electrical power to the electrical load. Therefore the insufficient electric energy is compensated by buying electrical energy from utility. When the operational scheduling is performed considering the environmental problem. This paper shows the simulation results for daily operational scheduling obtained using the evolutionary algorithm. This results reveal that the proposed modeling and strategy can be effectively applied to cogeneration system for paper mill.

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