• 대한전기학회:학술대회논문집
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• 대한전기학회 1998년도 하계학술대회 논문집 F
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• pp.2067-2069
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• 1998

A prototype semiconductor switch for the command resonant charging system has been developed for a line type modulator, which charges parallel pulse forming network(PFN) up to voltage of 5 kV at repetition rates of 60 Hz. A phase controlled power supply provides charging of the 4.7 ${\mu}s$ filter capacitor bank to voltage up to 5 kV. A solid state module of series stack array of sixe matched SCRs(1.6 kV, 50 A) is used as a command charging switch to initiate the resonant charging cycle. Both resistive and RC snubber network are used across each stage of the switch assembly in order to ensure proper voltage division during both steady state and transient condition. A master trigger signal is generated to trigger circuits which are transmitted through pulse transformer to each of the 6 series switch stages. A pulse transformer is required for high voltage trigger or power isolation. This paper will discuss trigger method, protection scheme, circuit simulation, and test result.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2006년도 제37회 하계학술대회 논문집 B
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• pp.1169-1170
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• 2006

Grid connected PV(Photovoltic) generation systems are becoming and actual and general. The power output of PV system is directly affected by the weather conditions. And when AC power supply is needed, power conversion by an inverter and a MPPT control are necessary. The PV power generation system can be treated to a harmonics source for the power distribution system. So, the PV system combined the function of active filter system can be useful applied in power distribution system. AF(Active Filters) intended for harmonic solutions are expending their functions from harmonic compensation of nonlinear loads into harmonic isolation between utilities and consumer. With the test analysis of the proposed control strategy of PV-AF system, the outcome of the test shows the stability and effectiveness of the proposed PV-AF system. The various capability of AF has been proved in previous research and usage. In this paper, authors present a DSP controlled PV-AF system for power conditioning in three-phase industrial or commercial power systems and verify it through experimental results.

• Journal of Magnetics
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• 제10권2호
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• pp.41-43
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• 2005

We have investigated an optical waveguide isolator with a multimode interference section by wafer direct bonding, operating at a wavelength $1.55\;{\mu}m$. In order to fabricate the device for monolithic integration, the wafer direct bonding between a magnetic garnet material as a cladding layer and a semiconductor guiding layer has been achieved. We found that wafer direct bonding between InP and GGG $(Gd_3Ga_5O_{12})$ is effective for the integration of a waveguide optical isolator. The isolation ratio was obtained to be 2.9 dB in the device.

• 한국재료학회지
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• 제17권2호
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• pp.115-120
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• 2007

Polycrystalline silicon (poly-Si) thin film transistors (TFTs) might be fabricated on the mica substrate and transferred to a flexible plastic substrate because mica can be easily cleaved into a thin layer. To overcome the adhesion and stress problem between poly-Si film and mica substrate, a buffer layer consisting of $SiO_x/Ta/Ti$ three layers has been developed. The $SiO_x$ layer is for electrical isolation, the Ti layer is for adhesion of $SiO_{x}$ and mica. and Ta is for stress relief between $SiO_x$ and Ti. A TFT was fabricated on the mica substrate by a conventional Si process and was successfully transferred to a plastic substrate.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1998년도 하계학술대회 논문집 G
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• pp.2501-2503
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• 1998

In this paper, the silicon-nitride membrane structure for IR sensor was fabricated through the etching and the direct bonding. The PTO layer as a IR detection layer was deposited on the membrane and its characteristics were measured. The attack of PTO layer during the etching of silicon wafer as well as the thermal isolation of the IR detection layer can be solved through the method of bonding/etching of silicon wafer. Because the PTO layer of c-axial orientation raised thermal polarization without polling, the more integration capability can be achieved. The surface roughness of the membrane was measured by AFM, the micro voids and the non-contacted area were inspected by IR detector, and the bonding interface was observed by SEM. The polarization characteristics and the dielectric characteristics of the PTO layer were measured, too.

• Investigative Magnetic Resonance Imaging
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• 제20권2호
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• pp.132-135
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• 2016

We report the case of a 43-year-old male with both giant left atrial appendage (LAA) aneurysm and drug-refractory atrial fibrillation (AF). The patient was treated with percutaneous electrical isolation of cardiac arrhythmogenic substrate, and has been free of AF symptom over one year. Although the surgical resection of giant LAA aneurysm is mostly used to prevent systemic thromboembolism, we have performed follow-up of the giant LAA aneurysm using cardiac magnetic resonance (CMR) imaging and transesophageal echocardiography (TEE) after the successful catheter ablation of refractory AF. At one-year follow-up CMR, the giant LAA aneurysm showed remarkable enlargement as well as decreased contractility. Additionally, one-year follow-up TEE showed spontaneous echo contrast as an indicator of blood stasis in the giant LAA aneurysm. Those findings of giant LAA aneurysm suggest that the risk of thromboembolism may be high despite termination of AF.

• 한국전자통신학회논문지
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• 제8권9호
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• pp.1307-1312
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• 2013

본 논문에서는 알칼리성 또는 산성을 띠는 특정 용액 내에서 전기분해 원리를 이용하여 금속 표면을 산화시켜 절연피막을 형성하는 장치를 개발한다. 기존에는 주로 양극에만 펄스 형태로 전압을 인가하는 단극성(unipolar) 방식이지만 본 논문에서는 H-브리지를 이용하여 양극에 양(+)전압과 음(-)전압을 번갈아 가면서 전압을 공급하는 양극성(bipolar) 장치를 제작하였으며, 금속 시편의 특성에 맞는 다양한 전기적인 조건을 가지고 산화피막을 형성할 수 있는 장치를 개발하였다. 공급전류 가변은 PWM 변조를 이용하였으며, (+)와 (-)의 극성변화는 H-브리지를 이용하여 양극성 펄스전압을 공급할 수 있도록 하였다. 그 결과로써 단극성보다 균일한 기공을 갖는 피막이 형성되었다.

• Journal of information and communication convergence engineering
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• 제11권3호
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• pp.147-152
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• 2013

A novel balun being the structure of a Wilkinson power divider is suggested and fabricated. One of the power dividing paths in the suggested balun uses a conventional ${\lambda}/4$ transmission line for $-90^{\circ}$ phase shifting, and the other path uses a composite right/left-handed -${\lambda}/4$ transmission line for $+90^{\circ}$ phase shifting with four series capacitors and three parallel inductors. In addition, the suggested balun uses two $50-{\Omega}$ resistors and a conventional $50-{\Omega}$ transmission line of ${\lambda}/2$ electrical length between the two output ports, achieving good isolation and reflection values of two balanced ports. The suggested balun is simulated by the advanced design system simulation program and fabricated on TLX-9 20-mil substrate. The fabricated balun has a very good values of $S_{11}$ = -27.46 dB, $S_{21}$ = -3.40 dB, and $S_{31}$ = -3.28 dB, a phase difference of $-179.5^{\circ}$, a magnitude difference of 0.12 dB, and a delay difference of 0.1 ns, with $S_{22}$ = -36.28 dB, $S_{33}$ = -27.19 dB, and $S_{32}$ = -25.2 dB at 1 GHz, respectively.

• 한국재료학회지
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• 제15권9호
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• pp.613-619
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• 2005

The ever increasing popularity and acceptance in the market place of portable systems, such as cell phones, PDA, notebook PC, etc., are fueling effects in further miniaturizing and lowering power consumption in these systems. The dynamic power consumption due to the CPU activities and the static power consumption due to leakage currents are two major sources of power consumption. Smaller devices and a lower de voltage lead to reducing the power requirement, while better insulation and isolation of devices lead to reducing leakage currents. All these can be harnessed in the SOI (silicon-on-insulator) technology. In this study, the key aspects of the SOI technology, mainly device electrical properties and device processing steps, are briefly reviewed. The interesting materials issues, such as SOI structure formation and SOI wafer fabrication methods, are then surveyed. In particular, the recent technological innovations in two major SOI wafer fabrication methods, namely wafer bonding and SIMOX, are explored and compared in depth. The results of the study are nixed in that, although the quality of the SOI structures has shown great improvements, the processing steps are still found to be too complex. Between the two methods, no clear winner has yet emerged in terms of the product quality and cost considerations.

• 한국산업융합학회 논문집
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• 제20권2호
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• pp.115-124
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• 2017

This paper aims to develop an SMPS topology for handling a high range of input voltages based on a DC-DC flyback converter circuit. For this purpose, 2 capacitors of the same specifications were serially connected on the input terminal side, with a flyback converter of the same circuit configuration serially connected to each of them, so as to achieve high input voltage and an effect of dividing input voltage. The serially connected flyback converters have the transformer turn ratio of 1:1, so that each coil is used for the winding of a single transformer, which is a characteristic of doubly-fed configuration and enables the correction of input capacitor voltage imbalance. In addition, a pulse transformer was designed and fabricated in a way that can achieve the isolation and noise robustness of the PWM output signal of the PWM controller that applies gate voltage to individual flyback converter switches. PSIM simulation was carried out to verify such a structure and confirm its feasibility, and a 100W class stack was fabricated and used to verify the feasibility of the proposed high voltage SMPS topology.