• 제목/요약/키워드: Electric device

검색결과 1,832건 처리시간 0.026초

As Te Ge Si 무정형 반도체의 온도영향 (A study of the effect of the temperature on the As Te Ge Si amorphous semiconductor)

  • 박창엽
    • 전기의세계
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    • 제23권6호
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    • pp.49-55
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    • 1974
  • Amorphous semiconductor from As 30 Te 48 Ge 10 Si 12 was prepared, and studied electron microscopy, X-ray analysis and resistivity measurement. It's resistivity is 1.56*10$^{6}$ .ohm.-cm when small ampule is used for preparing sample it is found that no phase separation has occurced by electron microscopy, and that phase transition temperature is 232.deg. C by differential Thermal Analysis. The specimen showed threshold switching that the low resistance state occur at critical electric field and the resistance recover at low applied field. Critical electric field of the switching is 10$^{5}$ V/cm at room temperature. Threshold voltage secreace exponentially with increasing ambient temperature and at that each voltage resistance of the switching device increase exponentially. According to the series resistance and applied vottage current slope on the V-I curve is varied. When applied voltage is decreased after switching, the resistance of the switching device is increased. By this result the origin of the switching is the Joule's heating.

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미세소자에서 누설전류의 분석과 열화 (Analysis and Degradation of leakage Current in submicron Device)

  • 배지철;이용재
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1996년도 추계학술대회 논문집
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    • pp.113-116
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    • 1996
  • The drain current of the MOSFET in the off state(i.e., Id when Vgs=0V) is undesired but nevertheless important leakage current device parameter in many digital CMOS IC applications (including DRAMs, SRAMs, dynamic logic circuits, and portable systems). The standby power consumed by devices in the off state have added to the total power consumed by the IC, increasing heat dissipation problems in the chip. In this paper, hot-carrier-induced degra- dation and gate-induced-drain-leakage curr- ent under worse case in P-MOSFET\`s have been studied. First of all, the degradation of gate-induced- drain-leakage current due to electron/hole trapping and surface electric field in off state MOSFET\`s which has appeared as an additional constraint in scaling down p-MOSFET\`s. The GIDL current in p-MOSFET\`s was decreased by hot-electron stressing, because the trapped charge were decreased surface-electric-field. But the GIDL current in n-MOS77T\`s under worse case was increased.

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ISO 26262 간섭 배제를 충족하는 CDD SRM 드라이버의 AUTOSAR 아키텍처 (AUTOSAR Architecture fulfilling ISO 26262 Freedom of Interference for CDD SRM Driver)

  • 조재윤;김영길
    • 한국정보통신학회:학술대회논문집
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    • 한국정보통신학회 2017년도 춘계학술대회
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    • pp.605-608
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    • 2017
  • SRM(Switched Reluctance Motor)은 향후 전기자동차의 구동모터로서 주목을 받고 있다. 기존 SRM 드라이버를 AUTOSAR CDD(Complex Device Driver)로 재사용될 때, ISO 26262 간섭 배제(Freedom of Interference) 원칙을 충족해야한다. 따라서 본 연구에서 AUTOSAR CDD SRM 드라이버의 간섭 배제기법을 제시한다.

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밧데리 방전 및 제어 전원 수전불가시 자생기동 가능한 전동차용 보조전원장치 (AuxiliaryPower Device of Spontaneous starting for Railway Vehicle when electric overdischarge or an impossibility of being supplied with control power)

  • 정순영;김상균;이현석;이경복
    • 한국철도학회:학술대회논문집
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    • 한국철도학회 2003년도 춘계학술대회 논문집
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    • pp.548-553
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    • 2003
  • Battery supplies Each Electric device in Railway vehicles with Control Power. When Battery is overchargedjustly, the battery voltage is not satisfied with the minimum operating voltage, CVCF Inverter(SIV) is supplied with external Power supply or the other railway vehicles and start up CVCF Inverter. In this paper to improve this problem, Dead battery Starter system is proposed. When the battery voltage is not satisfied with the minimum value.turn on the Dead Battery Starter switch, and the Dead Battery Starter supplies the control power to the SIV controller from the line voltage. With this Dead Battery Starter system, the train can be operated when the battery is not proper status. Dead Battery Starter is designed by ROTEM and will be delivered to Attiko Metro Series 2.

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Structure Modeling of 100 V Class Super-junction Trench MOSFET with Specific Low On-resistance

  • Lho, Young Hwan
    • 전기전자학회논문지
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    • 제17권2호
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    • pp.129-134
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    • 2013
  • For the conventional power metal-oxide semiconductor field-effect transistor (MOSFET) device structure, there exists a tradeoff relationship between specific on-resistance ($R_{ON.SP}$) and breakdown voltage ($V_{BR}$). In order to overcome the tradeoff relationship, a uniform super-junction (SJ) trench metal-oxide semiconductor field-effect transistor (TMOSFET) structure is studied and designed. The structure modeling considering doping concentrations is performed, and the distributions at breakdown voltages and the electric fields in a SJ TMOSFET are analyzed. The simulations are successfully optimized by the using of the SILVACO TCAD 2D device simulator, Atlas. In this paper, the specific on-resistance of the SJ TMOSFET is successfully obtained 0.96 $m{\Omega}{\cdot}cm^2$, which is of lesser value than the required one of 1.2 $m{\Omega}{\cdot}cm^2$ at the class of 100 V and 100 A for BLDC motor.

크레인의 고압 전선로 접근 경보장치 (A Power Line Proximity Detecter for Mobile Crane)

  • 최삼진;김현식;이종호;김일환;박찬원
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2001년도 하계학술대회 논문집 D
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    • pp.2374-2376
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    • 2001
  • In this paper we have developed a Power Line Proximity Detecting device for Mobile Crane by using a Derivation Electric-Potential Detection method. A mobile crane worker can be easily exposed to a dangerous electrical shock and the electrocution while they are working at near the high-voltage electrical lines. The derivation electric-potential of the power lines have been simulated in our experiment, Also, microprocessor-based detecting device and transmitter/receiver modules are introduced to show a solution for the dangerous mobile crane working environment. As a result, It has been shown a good functional field test.

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다결정 실리콘 박막 트랜지스터에서 공정 파라미터에 따른 전기적 특성의 모델링 (Modeling of Electrical Characteristics in Poly Silicon Thin Film Transistor with Process Parameter)

  • 정은식;최영식;이용재
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2001년도 추계학술대회 논문집
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    • pp.201-204
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    • 2001
  • In this paper, for modeling of electrical characteristics in Poly Silicon Thin Film Transistors with process parameters set up optimum values. So, the I-V characteristics of poly silicon TFT parameters are examined and simulated in terms of the variations in process parameter. And these results compared and analyzed simulation values with examination value. The simulation program for characteristic analysis used SUPREM IV for processing, Matlab for modeling by mathematics, and SPICE for electric characteristic of devices. Input parameter for simulation characteristics is like condition of device process sequence, these electric characteristic of I$_{D}$-V$_{D}$, I$_{D}$-V$_{G}$, variations of grain size. The Gate oxide thickness of poly silicon are showed similar results between real device characteristics and simulation characteristics.ristics.

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Performance Enhancement of Organic Light-emitting Diodes with an Electron-transport Layer of Bathocuproine

  • Honga, Jin-Woong;Guo, Yi-Wei;Shin, Jong-Yeol;Kim, Tae Wan
    • Transactions on Electrical and Electronic Materials
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    • 제17권1호
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    • pp.37-40
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    • 2016
  • Performance enhancement of organic light-emitting diodes (OLEDs) is investigated in a device structure of ITO/TPD/Alq3/LiF/Al and ITO/TPD/Alq3/BCP/LiF/Al. Here, bathocuproine (BCP) is used as an electron-transport layer. Current density-voltage-luminance characteristics of the OLEDs show that the performance of the device is better with BCP layer than without BCP layer. The current density, luminance, luminous efficiency, and external-quantum efficiency are improved by approximately 22%, 50%, 2%, and 18%, respectively. Since the BCP layer lowers the electron energy barrier, electron transport is facilitated and the movement of hole is blocked as the applied voltage increases. This results in an increased recombination rate of holes and electrons.

전기적 스트레스에 따른 Offset 구조를 갖는 n-채널 다결정 실리콘 박막 트랜지스터의 특성 분석 (The Analysis of Characteristics on n-channel Offset-gated poly-Si TFT's with Electical Stress)

  • 변문기;이제혁;임동규;백희원;김영호
    • 한국전기전자재료학회논문지
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    • 제13권2호
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    • pp.101-105
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    • 2000
  • The effects of electrical on n-channel offset gated poly-Si TFT's have been investigated. It is observed that the electrical field near the drain region in offset devices is smaller than that of conventional device by simulation results. The variation rate of threshold voltage and subthreshold slope decrease with increasing the offset length because of lowering the electric field near the drain region. The offset gated poly-Si TFT's have been probed effective in reducing the degradation rate of device performance under electrical stressing.

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소자 내부에서 전하 운송체의 이동 메카니즘에 관한 연구 (A Study on the Transference Mechanism of Charge carriers within the Devices)

  • 심혜연;김준호;김영관
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2005년도 하계학술대회 논문집 Vol.6
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    • pp.508-509
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    • 2005
  • In case of ITO/MEH-PPV/Al structure, the quantity of charge carriers flowing through the organic material was few and the density of them is fixed. The electric field inside of the device almost didn't change with the position. On the other hands, in case of Au/MEH-PPV/Au structure, the hole density increased rapidly nearby the anode but decreased nearby the cathode. The space charge phenomenon followed sufficient hole injection resulted in the change of the electric field with the position inside of the device. We verified that the result of the current-voltage simulation corresponded with experimental result.

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