• Title/Summary/Keyword: EPROM

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Design of the Embedded EPROM Circuits Aiming at Low Voltage Operation (저 전압동작을 위한 내장형 EPROM회로설계)

  • 최상신;김성식;조경록
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.40 no.6
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    • pp.421-430
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    • 2003
  • In the embedded system, EPROM is difficult to replace a mask ROM for the applications using battery, because the low voltage characteristic of an EPROM is inferior to that of a mask ROM. In this paper, the new circuits such as a word line voltage hoosier scheme and a sense amplifier without reference input for an embedded EPROM in MCU are proposed. The circuits can detect bit line voltage a predetermined level, which is caused by the degradation of the battery. We fabricated a MCU embedded 32Kbytes EPROM. The proposed circuits well operated at 1.5V supply voltage and thus the low voltage performance was improved by about 30%.

Effects of source bias on the programming characteristics of submicron EPROM/Flash EEPROM (Submicron EPROM/flash EEPROM의 프로그램 특성에 대한 소오스 바이어스의 영향)

  • 박근숙;이재호;박근형
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.33A no.3
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    • pp.107-116
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    • 1996
  • Recently, the flash memory has been abstracting great attention in the semiconductor market in the world because of its potential applications as mass storage devices. One of the most significant barriers to the scalling-down of the stacked-gate devices such as EPROM's and flash EEPROM's is the large subthreshold leakage in the unselected cells connected with the bit line of a selected cell in the array during programming. The large subthreshold leakge is majorly due to the capacitive coupling between the floating gates of the unselectd cells and the bit line of selected cell. In this paper, a new programming method to redcue significantly the drain turn-on leakage in the unselected cells during programming has been studied, where a little positive voltage (0.25-0.75V) is applied to the soruce during programming unlike the conventional programming method in which the source is grounded. The resutls of the PISCES simulations and the electrical measurements for the standard EPROM with 0.35.mu.m effective channel length and 1.0.mu.m effective channel width show that the subthreshold leakage in the unselectd cells is significantly large when the source is grounded, whereas it is negligibly small when the source is biased ot a little positive voltage during programming. On the other hadn, the positive bias on the source is found to have little effects on the programming speed of the EPROM.

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The Development of Linearized Digital Temperature Monitor Based on EPROM (EPROM을 이용한 선형디지탈 체온 모니터의 개발)

  • 고한우;이건기
    • Journal of Biomedical Engineering Research
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    • v.4 no.1
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    • pp.21-28
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    • 1983
  • The opjective of this research is to derelop the linearijed digital temperature monitor based on EPROM. The advantages associated with this proposod monitor as Compared with the conventional temperature montor is very high accuracy in wide range The accuracy of this monitor was evaluated by the experimental system which was consisted of the water-bath controller. mercury thermometor, and YSI-400 series probes.

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Efficient Interface circuits of Embedded Memory for RISC-based DSP Microprocessor (RICS-based DSP의 효율적인 임베디드 메모리 인터페이스)

  • Kim, You-Jin;Cho, Kyoung-Rok;Kim, Sung-Sik;Cheong, Eui-Seok
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.36C no.9
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    • pp.1-12
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    • 1999
  • In this paper, we designed an embedded processor with 128Kbytes EPROM and 4Kbytes SRAM based on GMS30C2132 which RISC processor with DSP functions. And a new architecture of bus sharing to control the embedded memory and external memory unit i proposed aiming at one-cycle access between memories and CPU. For embedded 128Kbytes EPROM, we designed the new expansion interface for data size at data ordering with memory organization and the efficient interface for test. The embedded SRAM supports an extended stack area high speed DSP operation, instruction cache and variable data-length control which is accessed with 4K modulo addressing schemes. The proposed new architecture and circuits reduced the memory access cycle time from 40ns and improved operation speed 2-times for program benchmark test. The chip is occupied $108.68mm^2$ using $0.6{\mu}m$ CMOS technology.

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A Microcomputer-Based Data Acquisition System (Microcomputer를 이용(利用)한 Data Acquisition System에 관(關)한 연구(硏究))

  • Kim, Ki Dae;Kim, Soung Rai
    • Journal of Biosystems Engineering
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    • v.7 no.2
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    • pp.18-29
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    • 1983
  • A low cost and versatile data acquisition system for the field and laboratory use was developed by using a single board microcomputer. Data acquisition system based on a Z80 microprocessor was built, tested and modified to obtain the present functional system. The microcomputer developed consists of 6 kB ROM, 5 kB RAM, 6-seven segment LED display, 16-Hex. key and 8 command key board. And it interfaces with an 8 channel, 12 bits A/D converter, a microprinter, EPROM programmer for 2716, and RS232C interface to transfer data between the system and HP3000 mini-computer manufactured by Hewlett Packard Co., A software package was also developed, tested, and modified for the system. This package included drivers for the AID converter, LED display, key board, microprinter, EPROM programmer, and RS232c interface. All of these programs were written in 280 assembler language and converted to machine codes using a cross assembler by HP3000 computer to the system during modifying stage by data transferring unit of this system, then the machine language wrote to the EPROM by this EPROM programmer. The results are summarized as follows: 1. Measuring program developed was able to control the measuring intervals, No. of channels used, and No. of data, where the maximum measuring speed was 58.8 microsec. 2. Calibration of the system was performed with triangle wave generated by a function generator. The results of calibration agreed well to the test results. 3. The measured data was able to be written into EPROM, then the EPROM data was compared with original data. It took only 75 sec. for the developed program to write the data of 2 kB the EPROM. 4. For the slow speed measurements, microprinter instead of EPROM programmer proved to be useful. It took about 15 min. for microprinter to write the data of 2 kB. 5. Modified data transferring unit was very effective in communicating between the system and HP3000 computer. The required time for data transferring was only 1~2 min. 6. By using DC/DC converting devices such as 78-series, 79-series. and TL497 IC, this system was modified to convert the only one input power sources to the various powers. The available power sources of the system was DC 7~25 V and 1.8 A.

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Polyoxide 절연막의 특성

  • Jo, Deok-Ho;Lee, Gyeong-Su;Nam, Gi-Su
    • ETRI Journal
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    • v.11 no.3
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    • pp.96-108
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    • 1989
  • 다결정 실리콘 위에 열산화 방법을 통해 형성된 산화막(Polyoxide)은 기억소자에서의 capapcitor 절연막이나, EPROM(Erasable Programmable Read Only Memory)과 EEPROM(Electrically EPROM) 소자의 tunneling 산화막으로사용된다. 이러한 Polyoxide 절연막은 낮은 누설전류, 높은 절연파괴전기장, 높은 철연파괴 전류밀도 등의 특성을 가져야 한다. 본 논문에서는 공정조건 변화에 따른 Polyoxide의 특성을 조사 분석하였다.

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Poly-Si 형성조건에 따른 Polyoxide의 전기적 특성

  • Jo, Deok-Ho;Lee, Gyeong-Su;Nam, Gi-Su
    • ETRI Journal
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    • v.11 no.4
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    • pp.119-127
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    • 1989
  • 다결정 실리콘 위에 열산화 방법을 통해 형성된 산화막(polyoxide)은 기억소자에서의 capscitor 절연막이나, EPROM(Erasable Programmable Read Only Memory)과 EEPROM(Electrically EPROM) 소자의 tunneling 산화막으로 사용된다. 이러한 polyoxide 절연막은 낮은 누설전류, 높은 절연파괴전기장, 높은 절연파괴 전류밀도등의 특성을 가져야 한다. 본 논문에서는 ployoxide의 형성조건에 따른 polyoxide의 전기적인 특성에 대하여 연구하였다.

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Study on the Fabrication of EPROM and Their Characteristics (EPROM의 제작 및 그 특성에 관한 연구)

  • 김종대;강진영
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.21 no.5
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    • pp.67-78
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    • 1984
  • EAROM device is an n-channel MOS transistor with a control gate stack ed on the floating gate. On account of channel injection type, channel lengths are designed 4-8 $\mu$m and chinnel widths 5-14 $\mu$m. These devices which have fourstructures of different type control gate are designed by NMOS 5 $\mu$m design rule and fabricated by double polysilicon gate NMOS Process. Double ion implantation is applied to increase punchthrough voltage and gate-controlled channel breakdown voltage. The drain and gate voltage for programming was 13-17V and 20-25V, respectively. EPROM cell fabricated could be erased not by optical method but by electrical method. The result of charge retention test showed decrease in stored charges by 4% after 200 hours at 1$25^{\circ}C$.

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The Digital Position Control System for PM Step Motor Using Microcomputer (마이크로컴퓨터를 이용한 PM스텝모터의 디지탈 위치제어시스템)

  • 성원기;최종수;하용수
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.10 no.5
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    • pp.229-239
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    • 1985
  • This paper presents the digital position control system for PM step motor using microcomputer. An algorithm is developed not only for the reduction of a lorge number of logiccircuits of the existing positon control system but also for the substitution to software for logic functions. The program to sotisfy this algorithm is studied out, which is written into the EPROM to make up the digital position control system. The justfiability of the system is proved by experiment.

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교류전동기의 벡터제어를 위한 공간벡터에 기저한 전류 제어기

  • 이윤종;임남혁;민강기
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.15 no.9
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    • pp.753-763
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    • 1990
  • This paper proposes a new current control strategy for current regulated VSI-PWM lnverter. The conventional hysteresis control method has good dynamic response, but the switching frequency in lower region are high because it does not optimise switching patterns. Proposed current control strategy can optimize switching patterns. As regulater, three level comparator are used, the output of comparator select appropriate inverter output voltage vectors via switching table stored in EPROM. The simulation and experimental results in comparison to conventional hysteresis strategy are presented and discussed.

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