• IEMEK Journal of Embedded Systems and Applications
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• v.2 no.3
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• pp.194-201
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• 2007

As the performance of the mobile terminal becomes higher, the power consumption gradually increases. As a result, power management is one of the most important issues in mobile system with battery. In this paper, we describe an DPM(Dynamic Power Management) using DVS(Dynamic Power Management) as a power management mechanism in Qplus operating system. DVS generally considers a specific device such as CPU, whereas we consider the relations with other hardware components as well as each component. We specially focus on the relation between CPU, memory and LCD devices. We also designs a kernel monitor to collect information to decide the policy for power management. According to the experimental results, the proposed method enables to save much power.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.7 no.5
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• pp.949-966
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• 2013

Recently, Wireless Body Area Network (WBAN) has promise to revolutionize human daily life. The need for multiple sensors and constant monitoring lead these systems to be energy hungry and expensive with short operating lifetimes. In this paper, we offer a review of existing work of WBAN and focus on energy-aware management in it. We emphasize that nodes computation, wireless communication, topology deployment and energy scavenging are main domains for making a long-lived WBAN. We study the popular power management technique Dynamic Voltage and Frequency Scaling (DVFS) and identify the impact of slack time in Dynamic Power Management (DPM), and finally propose an enhanced dynamic power management method to schedule scaled jobs at slack time with the goal of saving energy and keeping system reliability. Theoretical and experimental evaluations exhibit the effectiveness and efficiency of the proposed method.

• Journal of Electrical Engineering and Technology
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• v.11 no.4
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• pp.987-992
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• 2016

This study introduces an example environment where wireless devices are mobile, devices use dynamic voltage scaling, devices and tasks are heterogeneous, tasks have deadline, and the computation and communication power is dynamically changed for energy saving. For this type of environment, the efficient system-level energy management and resource management for task completion can be an essential part of the operation and design of such systems. Therefore, the resources are assigned to tasks and the tasks may be scheduled to maximize a goal which is to minimize energy usage while trying to complete as many tasks as possible by their deadlines. This paper also introduces mobility of nodes and variable transmission power for communication which complicates the resource management/task scheduling problem further.

• KIISE Transactions on Computing Practices
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• v.24 no.1
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• pp.10-16
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• 2018

The task of consolidating server workloads is critical for the efficiency of a datacenter in terms of reducing costs. However, as a greater number of workloads are consolidated in a single server, the performance of workloads might be degraded due to their contention to the limited shared resources. To reduce the performance degradation, scheduling for mitigating the contention of shared resources is necessary. In this paper, we present the Dynamic Voltage Frequency Scaling (DVFS) based memory-contention aware scheduling method for multi-threaded workloads. The proposed method uses two approaches: running memory-intensive threads on the limited cores to avoid concurrent memory accesses, and reducing the frequencies of the cores that run memory-intensive threads. With the proposed algorithm, we increased performance by 43% and reduced power consumption by 38% compared to the Completely Fair Scheduler(CFS), the default scheduler of Linux.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.38B no.1
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• pp.46-53
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• 2013

Recently, intensive research has been performed for reducing video decoder energy consumption, especially based on DVFS (Dynamic Voltage and Frequency Scaling) technique. Our previous work [1] has proposed the optimal DVFS algorithm for energy reduction in video decoders. In spite of the mathematical optimality of the algorithm, the precondition of known frame decoding cycle/complexity limits its application to some realistic scenarios. This paper overcomes this limitation by frame data size-based estimation of frame decoding complexity. The proposed decoding complexity estimation method shows over 90% accuracy. And with this estimation method and buffer underflow margin of around 20% of frame size, almost same power consumption reduction performance as the optimal algorithm can be achieved.

• Journal of KIISE
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• v.43 no.3
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• pp.296-303
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• 2016

Mobile real-time systems with limited system resources and a limited power source need to fully utilize the system resources when the workload is heavy and reduce energy consumption when the workload is light. EDZL (Earliest Deadline until Zero Laxity), a multiprocessor real-time scheduling algorithm, can provide high system utilization, but little work has been done aimed at reducing its energy consumption. This paper tackles the problem of DVFS (Dynamic Voltage/Frequency Scaling) in EDZL scheduling. It proposes a technique to compute a uniform speed on full-chip DVFS platforms and individual speeds of tasks on per-core DVFS platforms. This technique, which is based on the EDZL schedulability test, is a simple but effective one for determining the speeds of tasks offline. We also show through simulation that the proposed technique is useful in reducing energy consumption.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.2
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• pp.98-107
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• 2013

This work describes a 13b 100 MS/s 0.13 um CMOS four-stage pipeline ADC for 3G communication systems. The proposed SHA-free ADC employs a range-scaling technique based on switched-capacitor circuits to properly handle a wide input range of $2V_{P-P}$ using a single on-chip reference of $1V_{P-P}$. The proposed range scaling makes the reference buffers keep a sufficient voltage headroom and doubles the offset tolerance of a latched comparator in the flash ADC1 with a doubled input range. A two-step reference selection technique in the back-end 5b flash ADC reduces both power dissipation and chip area by 50%. The prototype ADC in a 0.13 um CMOS demonstrates the measured differential and integral nonlinearities within 0.57 LSB and 0.99 LSB, respectively. The ADC shows a maximum signal-to-noise-and-distortion ratio of 64.6 dB and a maximum spurious-free dynamic range of 74.0 dB at 100 MS/s, respectively. The ADC with an active die area of 1.2 $mm^2$ consumes 145.6 mW including high-speed reference buffers and 91 mW excluding buffers at 100 MS/s and a 1.3 V supply voltage.

• Journal of Korea Multimedia Society
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• v.11 no.5
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• pp.641-650
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• 2008

As portable devices are used widely, power management algorithm is essential to extend battery use time on small-sized battery power. Although many methods have been proposed, they assumed the voltage transition overhead was negligible or was considered partially. However, the voltage transition overhead might not guarantee to schedule real-time tasks in portable multimedia systems. This paper proposes the adaptive power-aware algorithm to minimize the power consumption by considering the voltage transition overhead. It selects only a few discrete frequencies from the whole frequencies of a system and adjusts the interval between two consecutive frequencies based on the system utilization to reduce the number of frequency change. This algorithm saves the power consumption about 10 to 25 percent compared to a CC RT-DVS method and a frequency-smoothing method.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.53 no.3
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• pp.157-161
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• 2004

We present a simple analytical expression of plasma density by making use of the electron density equation to study the dynamic behavior of the corona discharge plasma. It assumes that a specified voltage profile is fed through the inner conductor of the reactor chamber consisting of two coaxial conducting cylinders. The analytical description is based on the electron continuity equation with ionization and attachment by electrons. It is found that the electron density profile calculated between two coaxial cylindrical electrodes depends very sensitively on the Profile of applied voltage. The analytical expression of plasma density and its generation will provide important scaling laws in the corona discharge plasma.

• Journal of Institute of Control, Robotics and Systems
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• v.12 no.3
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• pp.221-226
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• 2006

In this paper, we study an approach to design a Fuzzy PI controller in HVDC(High Voltage Direct Current) system. In the rectifier of traditional HVDC system, turning on, turning off, triggering and protections of thyristors have lots of problems that can make the dynamic instability and cannot damp the dynamic disturbance efficiently. In order to solve the above problems, we adapt Fuzzy PI controller for the fire angle control of rectifier. The performance of the Fuzzy PI controller is sensitive to the variety of scaling factors. The design procedure dwells on the use of evolutionary computing(Genetic Algorithms, GAs). Then we can obtain factors of the Fuzzy PI controller by Genetic Algorithms. A comparative study has been performed between Fuzzy PI controller and traditional PI controller, to prove the superiority of the proposed scheme.